Driver Chip Pin Arrangement for Narrow Bezel Displays
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Solution Overview
Problem
Current touch display driver IC designs require large wiring spaces for signal routing, leading to increased bezel size and hindering the development of super-narrow bezel displays.
Innovation Solution
A driver chip with a specific pin arrangement, where first input pins are close to one long edge, second input pins are near short edges, and third input pins are on both sides of output pins, reducing wiring space and enabling efficient signal input and output, including data, power, and gate drive signals, with optional level switching for signal processing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If traditional pin arrangement is used, then signal routing is straightforward, but wiring space increases and bezel size increases
Solution Approach 1:
The patent transitions from traditional single-edge pin arrangement to multi-edge distribution, utilizing both long edges and short edges of the driver chip for pin placement. This dimensional redistribution of pins across multiple edges reduces the wiring burden on any single edge, thereby reducing overall wiring space and enabling narrower bezels while maintaining signal routing functionality.
2Ease of operation
If pins are concentrated on one edge, then connection is simplified, but wiring space on that edge increases
Solution Approach 1:
The patent segments the pin groups into different functional categories (first input pins for data signals, second input pins for power signals, third input pins for control signals) and distributes them across different edges of the driver chip. This segmentation reduces the concentration of pins on any single edge, thereby reducing wiring space requirements while maintaining connection simplicity through organized functional grouping.
3Device complexity
If all input pins are on one side, then layout is simple, but signal interference increases
Solution Approach 1:
The patent employs asymmetric pin distribution where different types of input pins are placed on different edges rather than symmetrically on one side. Data input pins, power input pins, and control input pins are strategically positioned on different edges to maximize spatial separation between signal types, reducing electromagnetic interference while maintaining a relatively simple overall layout.
Data Source
AI summary
Disclosed in embodiments of the present disclosure are a driver chip and a display device. The driver chip includes two opposite long edges, and two opposite short edges connected to the long edges; the driver chip includes multiple output pins and multiple input pins; the output pins are close to one of the long edges; the input pins include first input pins, second input pins, and third input pins; the first input pins are close to the long edge opposite to the output pins; the second input pins are close to the short edges; the third input pins are close to the long edge and located on both sides of the output pins.