Electro-optical Driver Circuit Shortens Off Sequence Time
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Solution Overview
Problem
Existing electro-optical device driver circuits take a long time to perform the off sequence operation, especially with a larger number of scanning lines, leading to extended off sequence time and potential burn-in phenomena.
Innovation Solution
An electro-optical device driver circuit with a shift register, reset signal output section, first logic circuit, enable signal output section, and second logic circuit that outputs transfer signals and reset signals with distinct voltage levels during display and off sequence periods, allowing for simultaneous activation of pixel-switching elements, thereby shortening the off sequence time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If sequential scanning of scanning lines is performed during off sequence operation, then all pixels can be reset to avoid burn-in, but the off sequence time becomes excessively long
Solution Approach 1:
The off sequence operation is divided into two distinct phases: a first off sequence period where scanning signals are supplied sequentially to all scanning lines to reset pixels, and a second off sequence period where scanning signals are not supplied. This segmentation allows the system to achieve complete pixel reset while reducing overall off sequence time by eliminating redundant sequential operations in the second phase.
Solution Approach 2:
During the first off sequence period, the driver circuit performs preliminary resetting of all pixels by supplying scanning signals to all scanning lines before the second off sequence period begins. This preliminary action ensures that residual charges are cleared from all pixel electrodes, preventing burn-in phenomena while allowing the second phase to operate more efficiently with reduced timing requirements.
2Manufacturing precision
If the number of scanning lines is increased to improve display resolution, then image quality improves, but off sequence time increases proportionally
Solution Approach 1:
The off sequence period is segmented into two phases with different scanning signal supply strategies. During the first phase, all scanning lines receive signals sequentially to ensure complete pixel reset. During the second phase, the circuit operates with reduced or no scanning signal supply. This segmentation allows high-resolution displays with many scanning lines to maintain adequate pixel reset while significantly reducing the total off sequence time compared to purely sequential operation.
3Stability of the object's composition
If scanning signals are supplied to all scanning lines during off sequence, then residual charge is evenly distributed, but the operation takes too long especially with large numbers of scanning lines
Solution Approach 1:
The off sequence operation is divided into two phases: the first phase supplies scanning signals to all scanning lines to achieve uniform residual charge distribution and prevent burn-in, while the second phase operates with reduced or no scanning signal supply to improve speed. This segmentation allows the system to achieve both uniform charge distribution and faster operation by eliminating redundant sequential scanning in the second phase.
Solution Approach 2:
The driver circuit changes the timing parameters of scanning signals between the two off sequence phases. During the first phase, scanning signals are supplied with sufficient pulse widths to ensure complete pixel reset and uniform charge distribution. During the second phase, the timing parameters are adjusted to reduce or eliminate scanning signal supply, thereby improving operation speed while maintaining the benefits achieved in the first phase.
Data Source
AI summary
A circuit includes a first logic circuit section that outputs a signal that could be in an active voltage level depending on a transfer-signal input from a shift register throughout a display period and outputs a signal whose voltage is constant at the active voltage level throughout an off sequence period; an enable signal output section that outputs an enable signal that is pulsed during the display period; and a second logic circuit section that outputs a signal corresponding to a logical product of the output signal of the first logic circuit section and the enable signal. The enable signal output section keeps the voltage of the enable signal constant at the active voltage level throughout the off sequence period.