Driver IC Using Multi-Chip Substrate Potentials for High Voltage

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Solution Overview

Problem

Current high-voltage driver integrated circuits require costly and time-consuming high withstand voltage processes, and existing solutions either limit output voltage or increase component count and parasitic elements, making it difficult to achieve high-speed and high-voltage performance.

Innovation Solution

A driver integrated circuit configuration using three or more chips with differential input, level shift, and output circuits, where each chip operates within the process withstand voltage, allowing for output voltages exceeding the process limit through resistive voltage division and optimized substrate potentials, minimizing parasitic elements and heat dissipation challenges.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Strength

If a high withstand voltage process is used to achieve high output voltage, then the output voltage capability is improved, but the manufacturing cost and development time increase

Engineering Contradiction:
Improveoutput voltage capabilityVSAvoidmanufacturing cost
Core Design Contradiction:
StrengthVSEase of manufacture

Solution Approach 1:

The driver integrated circuit is divided into multiple independent chips, each operating within the standard process withstand voltage range. By segmenting the circuit functionality across multiple chips connected in series, the overall output voltage capability exceeds the process limit while using standard manufacturing processes, thereby reducing cost and development time.

Inventive Principle:
Principle #1Segmentation

2Strength

If discrete components are used to achieve high output voltage, then the voltage capability is improved, but the number of components and parasitic elements increase

Engineering Contradiction:
Improveoutput voltage capabilityVSAvoidnumber of components
Core Design Contradiction:
StrengthVSDevice complexity

Solution Approach 1:

Multiple chips are integrated into a single packaged unit with internal interconnections, merging what would otherwise be separate discrete components into one compact assembly. This reduces the overall component count, minimizes external wiring and parasitic elements, while maintaining the high voltage capability through series connection of the individual chips.

Inventive Principle:
Principle #5Merging (Combining)

3Strength

If more chips are used to exceed process withstand voltage, then the output voltage is improved, but the mounting area increases

Engineering Contradiction:
Improveoutput voltageVSAvoidmounting area
Core Design Contradiction:
StrengthVSArea of stationary object

Solution Approach 1:

Multiple chips are nested within a single package housing, with each chip containing functional circuits that contribute to the overall high voltage output. This nested arrangement allows multiple chips to occupy a compact space, reducing the total mounting area compared to discrete component layouts while achieving the required voltage multiplication through series connection.

Inventive Principle:
Principle #7Nested doll (Nesting)

Data Source

PatentUS9698783B2Driver integrated circuit
Publication Date: 2017.07.04 HITACHI LTD
  • US9698783B2 patent drawing
  • US9698783B2 patent drawing
  • US9698783B2 patent drawing

AI summary

Provided is a configuration of a driver integrated circuit that can output a voltage exceeding the withstand voltage of a process, and that satisfies required apparatus performance (high speed and high voltage). A differential input circuit, a level shift circuit, and an output circuit are manufactured by the same process and divided and disposed on three or more chips with different substrate potentials (sub-potentials). By setting different applied voltages to the substrates of the chips, an output voltage greater than the process withstand voltage can be provided (see FIG. 2).