Dual-Leg Impedance Calibration Circuit for Mismatch-Free Driver Tuning
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Solution Overview
Problem
Existing impedance calibration circuits in semiconductor apparatuses face performance degradation and operation errors due to impedance mismatches during calibration.
Innovation Solution
The proposed impedance calibration circuit includes a first leg set and a second leg set, each calibrated to different target impedances using an impedance control code. A code generation circuit adjusts the impedance control code based on voltage comparisons with a reference voltage, and a timing control signal generation circuit manages the activation periods of timing control signals in response to an impedance calibration enable signal.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single impedance calibration circuit is used for multiple drivers, then device complexity is reduced, but impedance calibration precision deteriorates due to mismatches
Solution Approach 1:
The patent divides the calibration system into multiple independent calibration circuits, each dedicated to a specific driver. This segmentation allows each circuit to be optimized for its specific driver's impedance characteristics, eliminating the mismatches that would occur with a shared calibration circuit while maintaining overall system manageability.
Solution Approach 2:
Each calibration circuit is designed with local optimization for its specific driver, using driver-specific impedance values and calibration parameters. This local quality approach ensures that each driver receives precisely tailored calibration rather than a generic calibration that must compromise across multiple drivers.
2Manufacturing precision
If impedance calibration is performed for each driver individually, then impedance calibration precision is improved, but device complexity increases
Solution Approach 1:
The patent employs duplicate legs within each calibration circuit that replicate the driver's impedance characteristics. These copied structures allow the calibration circuit to accurately model and calibrate the driver's impedance without requiring complex measurement and adjustment mechanisms, simplifying the overall circuit design while maintaining precision.
3Manufacturing precision
If calibration time is extended to improve accuracy, then impedance calibration precision is improved, but productivity decreases
Solution Approach 1:
The patent performs impedance calibration during the initialization phase before normal operation begins. By conducting the calibration process in advance using initialization signals, the system establishes accurate impedance settings without interrupting or delaying the productive operational phase, thus maintaining both precision and productivity.
Solution Approach 2:
The calibration process is implemented as a periodic initialization sequence that occurs at defined intervals or at system startup. This periodic action allows the calibration to be completed within specific time windows without continuously interfering with operational productivity, balancing accuracy requirements with system throughput.
Data Source
AI summary
An impedance calibration circuit includes a first leg set having an impedance calibrated to a first target impedance according to an impedance control code during an activation period of a first timing control signal, a second leg set having an impedance calibrated to a second target impedance according to the impedance control code during an activation period of a second timing control signal, a code generation circuit configured to calibrate and output a value of the impedance control code according to a result of comparing a voltage of a node, to which the first leg set is connected, with a reference voltage, and a timing control signal generation circuit configured to generate the first timing control signal and the second timing control signal having different activation periods in response to an impedance calibration enable signal.