DRAM Package Driver Sizing for Stacked Array Dies

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Solution Overview

Problem

Existing memory package designs face challenges in reducing driver load, which leads to increased power consumption and space requirements due to the need for larger drivers to overcome electrical loads.

Innovation Solution

The proposed solution involves a DRAM package with stacked array dies and a control die, where the drivers are optimized by varying their size based on the load requirements of different data interconnects, thereby reducing overall load and power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If drivers are made larger to overcome electrical load, then signal driving capability is improved, but power consumption and space requirements increase

Engineering Contradiction:
Improvedriver power consumptionVSAvoidsignal driving capability
Core Design Contradiction:
PowerVSEase of operation

Solution Approach 1:

The patent applies local quality by varying the driver size according to the specific load requirements of different data interconnects. Instead of using uniformly large drivers for all interconnects, the control die includes drivers of different sizes matched to the actual electrical load each interconnect must drive, thereby reducing overall power consumption while maintaining adequate signal driving capability where needed.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes the parameter of driver size to optimize performance. By adjusting the driver size parameter based on the electrical load characteristics of each data interconnect, the system achieves better power efficiency without sacrificing signal integrity. This parameter optimization allows smaller drivers to be used where load is lighter, reducing power consumption and space requirements.

Inventive Principle:
Principle #35Parameter changes

2Ease of manufacture

If uniform driver size is used for all data interconnects, then design simplicity is maintained, but power consumption increases due to oversized drivers

Engineering Contradiction:
Improvedesign simplicityVSAvoiddriver power consumption
Core Design Contradiction:
Ease of manufactureVSLoss of energy

Solution Approach 1:

The patent implements local quality by differentiating driver sizes across the control die based on the specific electrical load requirements of each data interconnect. This approach moves away from uniform driver design, allowing each driver to be optimally sized for its particular function, thereby reducing overall power consumption while maintaining manufacturability through a systematic design approach.

Inventive Principle:
Principle #3Local quality

3Quantity of substance

If stacked array dies are implemented, then memory capacity is increased, but driver load and complexity increase

Engineering Contradiction:
Improvememory capacityVSAvoiddriver load management
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent applies local quality in the context of stacked array dies by having the control die manage different data interconnects with appropriately sized drivers for each die. This differentiated approach to driver sizing simplifies the management of driver load across multiple stacked dies, as each driver is optimized for its specific target rather than requiring all drivers to handle maximum potential loads to all dies.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS12308087B2Memory package having stacked array dies and reduced driver load
Publication Date: 2025.05.20 NETLIST INC
  • US12308087B2 patent drawing
  • US12308087B2 patent drawing
  • US12308087B2 patent drawing

AI summary

A DRAM packages comprises stacked array dies including at least a first array die and a stacked over at least the first array die, data terminals, via which the DRAM package receives or outputs data signals, first data interconnects between respective ones of the data terminals and the first array die, and second data interconnects distinct from the first data interconnects and between respective ones of the data terminals and the second array die. The DRAM package further comprises drivers configured to drive first data signals to the first array die via the first data interconnects and second data signals to the second array die via the second data interconnects. A first data signal is driven by one or more drivers having a first driver size, and a second data signal is driven by one or more drivers having a second driver size different from the first driver size.