Driving Circuit Segmentation for High-Resolution Display Charging
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Solution Overview
Problem
In high-resolution displays with increased pixel density, the horizontal scanning time is shortened, leading to insufficient charging rates and incorrect data voltage writing due to conventional inner compensation methods, resulting in display uniformity issues and mura on adjacent lines.
Innovation Solution
A driving circuit design that includes a light emitting element, transistors, capacitors, and a regulator circuit, allowing for independent compensation and data writing periods to prevent overlap and ensure adequate charging time, using control signals to manage the threshold voltage compensation and data signal writing through capacitance coupling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the pixel number along the vertical direction is increased to achieve higher resolution, then the display resolution is improved, but the horizontal scanning time is shortened causing insufficient charging rate
Solution Approach 1:
The patent segments the operation into distinct phases: a compensation period for threshold voltage compensation and a data writing period for data signal writing. This temporal segmentation allows each operation to be performed independently with adequate time allocation, preventing the charging insufficiency that occurs when operations are overlapped in high-resolution displays with shortened scanning time.
2Reliability
If conventional inner compensation operation is used to compensate threshold voltage, then the threshold voltage compensation is achieved, but the charging rate becomes insufficient due to time overlap
Solution Approach 1:
The patent divides the operation timeline into separate compensation period and data writing period. During the compensation period, only threshold voltage compensation is performed; during the data writing period, only data signal writing is performed. This eliminates the time overlap that causes charging insufficiency while maintaining reliable threshold voltage compensation.
Solution Approach 2:
The patent performs threshold voltage compensation in advance during the compensation period before the data writing period begins. This preliminary action ensures that the compensation is completed with sufficient charging time, and the compensated threshold voltage is then used during the subsequent data writing operation, preventing mura defects.
3Speed
If the horizontal scanning time is shortened due to higher pixel density, then the display refresh rate is improved, but incorrect data voltage writing occurs due to insufficient charging time
Solution Approach 1:
The patent segments the scanning operation into distinct compensation and data writing periods. This segmentation allows the data writing period to be optimized for speed (improving refresh rate) while the compensation period ensures adequate charging time for accurate voltage writing, preventing the trade-off between speed and accuracy.
Solution Approach 2:
The patent performs threshold voltage compensation as a preliminary action before data writing. This ensures that the transistor parameters are stabilized in advance, allowing the subsequent data writing operation to proceed quickly with accurate voltage levels, thus achieving both high refresh rate and writing accuracy.
Data Source
AI summary
A driving circuit includes a light-emitting element, a first transistor, a second transistor, a third transistor, a fourth transistor, a first capacitor and a regulator circuit. The first transistor, the second transistor and the light-emitting element are coupled in series between a first system voltage terminal and a second system voltage terminal. A first terminal of the first transistor is coupled to the first system voltage terminal. The third transistor is electrically coupled between a gate terminal and a second terminal of the first transistor. The fourth transistor is electrically coupled between the gate terminal of the first transistor and the second system voltage terminal. A first terminal of the first capacitor is electrically coupled to the gate terminal of the first transistor. A regulator circuit is electrically coupled to a second terminal of the first capacitor.