Driving Circuit Reset Scheme for Transistor Stress Relief
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Solution Overview
Problem
Display apparatuses experience stress-related issues such as threshold voltage shift, increased leakage current, and decreased drive current due to prolonged low-level signals at internal nodes, leading to reduced lifespan and increased power consumption.
Innovation Solution
A driving circuit with a reset circuit that initializes internal nodes to predefined voltage levels, using specific transistor configurations and capacitors to manage voltage transitions and distribute stress, thereby reducing long-term degradation and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Duration of action of stationary object
If transistors operate with prolonged low-level signals at internal nodes, then the display apparatus can maintain continuous operation, but stress-related issues occur including threshold voltage shift, increased leakage current, and decreased drive current
Solution Approach 1:
The reset circuit proactively initializes internal nodes to predetermined voltage levels before stress-related issues can develop. This preliminary action prevents threshold voltage shifts and leakage current increases by ensuring transistors start each operation cycle in a known good state, rather than waiting for degradation to occur
Solution Approach 2:
The reset signal is applied periodically to internal nodes at specific timing intervals during the operation cycle. This periodic initialization ensures that even during continuous operation, transistors are regularly refreshed to eliminate accumulated stress effects, maintaining reliable performance over extended periods
2Ease of operation
If internal nodes remain at low voltage levels for extended periods, then the circuit can maintain simple operation, but leakage current increases and power consumption rises
Solution Approach 1:
The reset circuit proactively raises internal nodes to predetermined voltage levels before leakage current can significantly increase. By initializing nodes to appropriate voltage levels at the start of each operation cycle, the circuit prevents the accumulation of leakage current that would otherwise occur during extended low-voltage periods
Solution Approach 2:
The periodic reset signaling ensures continuous maintenance of proper voltage levels at internal nodes throughout operation. This continuous action prevents the interruption of useful function that would occur if leakage current degraded performance, while maintaining operational simplicity through automated periodic initialization
3Reliability
If reset signals are applied to initialize internal nodes, then transistor stress is reduced and reliability improves, but additional circuit complexity is introduced
Solution Approach 1:
The reset circuit utilizes existing circuit elements and voltage levels already present in the display apparatus. By repurposing available resources for the reset function rather than adding completely separate dedicated components, the circuit achieves improved reliability while minimizing the increase in overall device complexity
Solution Approach 2:
The reset circuit is designed to automatically initialize internal nodes without requiring external control or additional complex logic. The circuit serves itself by using inherent operating signals to trigger reset operations, reducing the need for external complexity while maintaining transistor performance stability
Data Source
AI summary
A driving circuit includes a stage including a first transistor connected to a first terminal receiving a start signal, and to a first node, a second transistor connected between the first node and a second node, an inverter connected between a third terminal, receiving a second voltage, and the second terminal, the inverter being configured to control a voltage of a third node to be a voltage obtained by inverting a voltage level of the first node or the second node, a pull-down transistor including a gate connected to the second node, a pull-up transistor including a gate connected to the third node, and a reset circuit configured to reset the second node or the third node.