Driving Circuit for Display Panel with Time-Sharing Data Writing

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional driving methods for display panels with high refresh rates, such as those used in VR and gaming, face issues with insufficient threshold voltage compensation, leading to uneven display quality.

Innovation Solution

A driving circuit with multiple modules that simultaneously drive and reset adjacent rows of pixel circuits, utilizing time-sharing data writing to increase threshold voltage compensation time, and includes GOA units for controlling light emission and threshold voltage setting, along with switching transistors for efficient data transfer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If the refresh rate of the display panel is raised to 90 Hz or 120 Hz, then the display performance and visual perception are improved, but the threshold voltage compensation capacity becomes insufficient, resulting in uneven display

Engineering Contradiction:
Improverefresh rateVSAvoiddisplay uniformity
Core Design Contradiction:
SpeedVSManufacturing precision

Solution Approach 1:

The pixel circuit is divided into multiple sub-pixel circuits, with each sub-pixel circuit independently compensating for threshold voltage. This segmentation allows each sub-pixel to receive adequate compensation time even at high refresh rates, preventing display uniformity issues while maintaining high-speed operation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The threshold voltage compensation is performed in advance during specific time periods before the pixel circuit needs to operate. By preliminarily compensating the threshold voltage during dedicated compensation periods, the system ensures that compensation is complete before high-speed display operation begins, eliminating uneven display at high refresh rates.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If conventional driving methods are used at high refresh rates, then the system operation speed is improved, but the threshold voltage compensation time is reduced, leading to insufficient compensation capacity

Engineering Contradiction:
Improveoperation speedVSAvoidcompensation time
Core Design Contradiction:
ProductivityVSDuration of action of moving object

Solution Approach 1:

The driving method employs periodic compensation cycles where the pixel circuit alternates between compensation periods and display periods. During compensation periods, the threshold voltage is replenished; during display periods, the pixel operates at high speed. This periodic action ensures adequate compensation time is allocated regularly without reducing overall operation speed.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The threshold voltage compensation is performed in advance during specific time periods before the pixel circuit needs to operate. By preliminarily compensating the threshold voltage during dedicated compensation periods, the system ensures that compensation is complete before high-speed display operation begins, eliminating uneven display at high refresh rates.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10923027B2Driving circuit, display panel, and control method thereof
Publication Date: 2021.02.16 BOE TECHNOLOGY GROUP CO LTD
  • US10923027B2 patent drawing
  • US10923027B2 patent drawing
  • US10923027B2 patent drawing

AI summary

The present disclosure provides a driving method, a display panel and a control method thereof. The driving circuit is configured to drive pixel circuits arranged in an array. The driving circuit includes a plurality of driving modules and a plurality of data writing modules. Each of the plurality of driving modules is connected to two adjacent rows of the pixel circuits through a controlling line and is configured to drive the two adjacent rows of the pixel circuits simultaneously. Each of the plurality of data writing modules is connected to a data line and one column of the pixel circuits, respectively, and is configured to write display data of the data line into a pixel circuit of odd row and a pixel circuit of even row in the one column of pixel circuits in a time sharing manner in response to the driving modules driving the pixel circuits.