Driving Signal Control Circuit for Core Voltage Stabilization
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Solution Overview
Problem
Existing driving signal control circuits for semiconductor memory devices face challenges in efficiently managing core voltage levels during operations, leading to increased current consumption and potential overdriving issues.
Innovation Solution
A driving signal control circuit comprising a discharge circuit, counter circuit, and control circuit that compares monitored voltage to a reference voltage, generates discharge and count signals, and adjusts the enable period of driving signals to control overdriving and stabilize core voltage levels, thereby reducing current consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If the driving signal enable period is extended to ensure stable core voltage, then voltage stability is improved, but current consumption increases
Solution Approach 1:
The patent implements dynamic adjustment of the driving signal enable period based on real-time core voltage monitoring. The control circuit extends or shortens the enable period adaptively according to voltage conditions, transitioning from a static fixed period to a dynamic variable period that optimizes both stability and energy consumption
Solution Approach 2:
The patent employs a feedback mechanism where the control circuit monitors core voltage levels and uses this information to adjust the driving signal enable period. The monitoring circuit provides continuous voltage feedback that triggers enable period extension when voltage drops are detected, creating a closed-loop control system that balances stability and power consumption
2Speed
If overdriving is used to quickly charge bit lines, then sensing speed is improved, but core voltage fluctuation increases
Solution Approach 1:
The patent applies preliminary anti-action by detecting core voltage drops caused by overdriving operations and triggering enable period extension before voltage instability becomes severe. The control circuit anticipates voltage fluctuations from overdriving and compensates by adjusting the enable period in advance, preventing rather than merely responding to instability
Solution Approach 2:
The patent uses controlled excessive action through overdriving, applying higher than normal driving signal levels for specific operations like bit line charging. The enable period is selectively extended only during these excessive action intervals rather than continuously, allowing speed enhancement while limiting voltage instability to manageable, temporary fluctuations
Data Source
AI summary
A driving signal control circuit includes a discharge circuit, a counter circuit, and a control circuit. The discharge circuit is configured to compare a monitored voltage and a reference voltage, and generate a discharge signal. The monitored voltage is proportional to a core voltage. The counter circuit is configured to perform an up/down count operation according to the discharge signal, and generate a count signal. The control circuit is configured to generate a driving signal which has an enable period proportional to the count signal.