Driving Substrate Oxide Semiconductor Current Limiting
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Solution Overview
Problem
Oxide semiconductor TFTs face damage due to high current in high voltage environments, leading to signal delay and high power consumption due to parasitic capacitance, which conventional methods attempt to mitigate by enlarging the channel layer but result in increased capacitance.
Innovation Solution
A driving substrate with a resistor coupled to an active device, where the first passivation layer contacts the oxide semiconductor layer for a specific conductivity and the second passivation layer contacts the resistor for a different conductivity, effectively limiting current and minimizing parasitic capacitance by increasing total resistance in the circuit.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the channel layer length is enlarged to reduce current loading, then the active device can endure high current, but parasitic capacitance increases resulting in signal delay and higher power consumption
Solution Approach 1:
The patent divides the current path into two segments: the active device channel and the resistor. By segmenting the current limiting function between the active device and the resistor, the channel length can be kept short (reducing parasitic capacitance) while still achieving high current endurance through the series resistor configuration.
Solution Approach 2:
The resistor acts as an intermediary element between the power supply and the active device. It mediates the current flow, limiting the current to safe levels without requiring the active device channel to be enlarged, thus avoiding increased parasitic capacitance.
2Reliability
If the channel layer length is enlarged to reduce current loading, then the active device can endure high current, but power consumption increases
Solution Approach 1:
The current limiting function is segmented between the active device and the resistor. This allows the active device to operate with a short channel (low parasitic capacitance) while the resistor handles the current limiting, reducing overall power consumption compared to using a long channel alone.
Solution Approach 2:
The patent changes the circuit configuration by introducing a resistor in series with the active device. This parameter change in the circuit topology allows current limiting without requiring changes to the active device geometry that would increase power consumption.
3Reliability
If a resistor is coupled to the active device to limit current, then high current damage is prevented, but device complexity increases
Solution Approach 1:
The resistor and active device are merged into a single current path configuration. By combining these elements in series, the current limiting function is achieved with minimal additional structural complexity, as both elements share the same current path and can be integrated closely.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Prevents active device burnout from high current, reduces signal delay, and lowers power consumption by limiting current through the active device while maintaining stability and extending the lifetime of the display apparatus.
Implementation Method 1
a portion of the first passivation layer directly contacts to the oxide semiconductor layer such that the oxide semiconductor layer has a first conductivity
Implementation Method 2
a portion of the second passivation layer directly contacts to the resistor such that the resistor has a second conductivity
Implementation Method 3
effectively limiting current and minimizing parasitic capacitance by increasing total resistance in the circuit
Implementation Method 4
minimizing parasitic capacitance by increasing total resistance in the circuit
Data Source
AI summary
A driving substrate includes a substrate, at least one active device, a resistor, a first passivation layer and a second passivation layer. The active device including an oxide semiconductor layer and the resistor coupled to the active device are disposed on the substrate. The first passivation layer covers the active device, wherein a portion of the first passivation layer directly contacts to the oxide semiconductor layer such that the oxide semiconductor layer has a first conductivity. The second passivation layer covers the first passivation layer and the resistor, wherein a portion of the second passivation layer directly contacts to the resistor such that the resistor has a second conductivity. The first conductivity is different from the second conductivity.