Deep Reinforcement Learning Semiconductor Layout Optimization
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Solution Overview
Problem
In semiconductor manufacturing, process errors during etching due to pattern characteristics and environmental factors limit the accuracy of target pattern formation, especially as devices become more integrated and processes are miniaturized, causing unintended environmental changes when correcting one pattern affects nearby patterns.
Innovation Solution
A layout optimization system utilizing deep reinforcement learning (DRL) to generate a predicted layout, apply size corrections to patterns, and reflect mutual influences between patterns, thereby compensating for environmental changes and optimizing the layout to minimize interference.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If pattern correction is applied to achieve target pattern accuracy, then manufacturing precision improves, but environmental changes affect nearby patterns causing reliability deterioration
Solution Approach 1:
The system performs preliminary simulation to predict the layout before actual manufacturing, identifying potential environmental changes and their effects on nearby patterns in advance. This allows the system to pre-adjust patterns to compensate for anticipated environmental changes, thereby maintaining both manufacturing precision and reliability.
Solution Approach 2:
The system uses simulated annealing optimization to iteratively adjust patterns based on feedback from simulation results. The simulation predicts how environmental changes will affect pattern formation, and the optimization algorithm uses this feedback to refine the layout, ensuring that corrections to one pattern do not adversely affect nearby patterns.
2Manufacturing precision
If deep reinforcement learning is used to optimize layout, then manufacturing precision improves, but device complexity increases
Solution Approach 1:
The system introduces a simulation environment as an intermediary between the deep reinforcement learning agent and the actual manufacturing process. The simulation acts as a virtual training ground that provides realistic feedback without requiring complex physical experiments, thereby improving manufacturing precision while managing system complexity through software-based modeling.
Solution Approach 2:
The system creates a virtual copy of the manufacturing environment through simulation, allowing the deep reinforcement learning algorithm to learn and optimize layout patterns in silico before deployment. This copying approach enables high-precision optimization without proportionally increasing physical system complexity, as the complex learning processes occur in the virtual model.
Data Source
AI summary
A layout optimization system for correcting a target layout of a semiconductor process includes a deep reinforcement learning (DRL) module, a memory storing instructions, and a processor configured to execute the instructions to receive a target layout, generate, by the DRL module, a prediction layout by applying a simulation to the target layout, generate, by the DRL module, an optimal layout based on the prediction layout, and apply a size correction to at least one pattern of the prediction layout based on the optimal layout.