DRAM On-Die ECC Metadata Storage and Access

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Solution Overview

Problem

Conventional DRAM systems face challenges in storing and accessing metadata without compromising ECC coverage or reducing capacity, as they often reuse ECC bits for metadata storage, leading to reduced single-device data correction capabilities and limited RAS coverage.

Innovation Solution

Implementing an on-die ECC metadata storage and access scheme within DRAM devices, where metadata is stored and accessed via dedicated pins and circuitry, allowing parallel access and transmission without extending data burst lengths or altering core timing parameters, thereby maintaining ECC coverage and capacity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If ECC bits are reused for metadata storage, then metadata storage capability is improved, but single-device data correction capability deteriorates

Engineering Contradiction:
Improvemetadata storage capabilityVSAvoidsingle-device data correction capability
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent segments the ECC bits into two distinct functional groups: some ECC bits remain dedicated to data correction operations, while other ECC bits are allocated for metadata storage. This segmentation allows the system to simultaneously maintain data correction capability while providing metadata storage functionality without compromising either function.

Inventive Principle:
Principle #1Segmentation

2Quantity of substance

If metadata is stored in separate memory devices, then metadata storage is improved, but device complexity and access time deteriorate

Engineering Contradiction:
Improvemetadata storageVSAvoiddevice complexity and access time
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent merges the metadata storage function with the existing ECC bit infrastructure within the same DRAM device. By combining metadata storage with the data storage function in a single device using shared ECC bits, the system eliminates the need for separate metadata memory devices, thereby reducing overall device complexity and enabling parallel access to both data and metadata without additional access time penalties.

Inventive Principle:
Principle #5Merging (Combining)

3Quantity of substance

If RAS coverage is reduced to accommodate metadata storage, then metadata storage capacity is improved, but system reliability deteriorates

Engineering Contradiction:
Improvemetadata storage capacityVSAvoidRAS coverage
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent applies local quality by differentiating the functional roles of different ECC bit groups within the same memory device. Specific ECC bits are locally assigned to metadata storage while other ECC bits maintain their traditional role in data correction, ensuring that RAS coverage is preserved for data integrity while simultaneously providing metadata storage capacity.

Inventive Principle:
Principle #3Local quality

Data Source

PatentEP4459468A1Storage and access of metadata within selective dynamic random access memory (DRAM) devices
Publication Date: 2024.11.06 INTEL CORP
  • EP4459468A1 patent drawingFigure 1A
  • EP4459468A1 patent drawingFigure 1B
  • EP4459468A1 patent drawingFigure 2

AI summary

Techniques for storing and accessing metadata within selective dynamic random access memory (DRAM) devices are described. In one example, a dual in-line memory module (DIMM) includes a plurality of dynamic random access memory (DRAM) devices, wherein each of plurality of DRAM devices includes on-die ECC bits. At least one of the plurality of DRAM devices includes circuitry to provide access to read from and write to the on-die ECC bits of the DRAM device. The DIMM includes one or more pins to transmit metadata to and from the on-die ECC bits of the DRAM device.