Drop Recipe Database for Semiconductor Nanoimprint Lithography
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Solution Overview
Problem
The existing nanoimprint lithography techniques face challenges in efficiently creating drop recipes for semiconductor integrated circuits, leading to increased time and defects due to the need for multiple test recipes and varying resist material application across different imprint positions on a wafer, particularly at the outermost and center regions.
Innovation Solution
A drop recipe creation assistant database is generated by selecting the least defective drop recipes per imprint position based on defect inspection results and CD measurement values, allowing for the creation of optimized drop recipes per IP, which simplifies the process and reduces the time required for manufacturing by storing and retrieving drop recipes for specific imprint positions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If multiple test drop recipes are created and tested for each imprint position, then the manufacturing precision of resist material application is improved, but the time required for drop recipe creation increases
Solution Approach 1:
The system performs preliminary testing and evaluation of multiple test drop recipes in advance, storing the results in a database. When creating drop recipes for new semiconductor integrated circuits, the system retrieves and combines previously evaluated recipes from the database, avoiding the need to conduct new tests for each new circuit design.
Solution Approach 2:
The system creates optimized drop recipes by copying and combining proven recipes from the database for similar circuit patterns and imprint positions. Instead of creating entirely new recipes through trial and error, the system replicates successful patterns from previous tests, significantly reducing creation time while maintaining precision.
2Ease of operation
If a single unified drop recipe is used for all imprint positions, then the ease of operation is improved, but the manufacturing precision varies at outermost and center regions
Solution Approach 1:
The system divides the wafer surface into multiple imprint position regions (center, outermost, and intermediate zones) and creates optimized drop recipes for each region based on their specific characteristics. The database stores separate optimized recipes for different regions, allowing the system to select the most appropriate recipe for each position while maintaining overall process simplicity through automated selection.
Solution Approach 2:
The system applies different drop recipe parameters (discharge amounts, discharge intervals, application speeds) tailored to specific local requirements of different imprint positions. Center regions may require different parameters compared to outermost regions, and the system optimizes each locally while managing them through a unified database structure.
3Reliability
If all GDS data layers are read to create drop recipes, then the completeness of design information is ensured, but the productivity of drop recipe creation decreases
Solution Approach 1:
The system extracts only the essential design information needed for drop recipe creation from GDS data, such as circuit pattern types, density distributions, and critical dimension requirements. Instead of processing all GDS layers, the system identifies and extracts only the relevant layers and parameters, significantly reducing processing time while ensuring all necessary design information is captured.
Solution Approach 2:
The system performs preliminary analysis and categorization of GDS data to identify which layers and parameters are relevant for drop recipe creation. By pre-processing and tagging design information during initial data import, the system avoids the need to read and process all GDS layers repeatedly when creating new drop recipes.
Data Source
AI summary
According to one embodiment, a plurality of test drop recipes are first created based on design data on a semiconductor integrated circuit. Based on a defect inspection result of a pattern of a hardening resin material, which is formed by pressing a template on which patterns of the semiconductor integrated circuit are formed onto the hardening resin material applied to a substrate to be processed by use of the test drop recipes, a drop recipe with least defects is selected per press position on the substrate to be processed from the test drop recipes. The selected drop recipes for respective press positions are collected per functional circuit block configuring the semiconductor integrated circuit, thereby to generate a drop recipe creation assistant database.