Zero-Latency Data Recovery Unit Using Parallel Phase Detection
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The existing data recovery units (DRUs) face limitations in bandwidth due to processing time constraints, particularly as datapath width increases, making it challenging to handle wide spread spectrum clock and high sinusoidal jitter requirements in protocols like DisplayPort, which demands wider bandwidth and lower processing latency.
Innovation Solution
A data recovery unit with a zero-latency loop structure that compares a reference phase with input data to determine phase errors, calculates an unbiased phase error, and uses this error to adjust the oscillator output, allowing for efficient data recovery without latency constraints on bandwidth tuning.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the datapath width of the DRU is increased to handle wider bandwidth requirements, then the DRU can meet protocol requirements for wide spread spectrum clock and high sinusoidal jitter, but the processing time increases, limiting the upper bound of the bandwidth
Solution Approach 1:
The phase detector unit is divided into multiple parallel phase detectors, each handling a portion of the N wires. This segmentation allows the system to process wider datapaths in parallel, reducing the processing time per phase error calculation while maintaining the ability to handle wide bandwidth requirements.
Solution Approach 2:
The patent transitions from sequential processing to parallel processing by utilizing multiple phase detectors operating simultaneously on different wire groups. This dimensional change from time-sequential to space-parallel architecture reduces processing time while accommodating wider datapath widths needed for high bandwidth operation.
2Reliability
If the processing time is reduced to meet jitter tolerance requirements, then the DRU can handle high sinusoidal jitter and wide spread spectrum clock, but the bandwidth tuning capability is limited by the latency
Solution Approach 1:
Multiple phase detectors perform phase error calculations in advance and in parallel, preparing phase error information before it is needed for bandwidth tuning. This preliminary parallel computation reduces the critical path latency while maintaining accurate phase error measurement for jitter tolerance.
Solution Approach 2:
The patent creates multiple copies of the phase detector unit, each processing different groups of wires independently. These parallel copies produce phase error information simultaneously, reducing the overall processing latency while maintaining the precision needed for jitter tolerance and bandwidth tuning.
Data Source
AI summary
A data recovery unit (DRU) includes: an oscillator; a phase detector unit configured to receive a reference phase and to receive input data through N wires, where N is an integer, to compare the reference phase with the input data to obtain phase errors, and to determine an average of the phase errors; a subtractor to subtract an output of the oscillator from the average of the phase errors to obtain an unbiased phase error; a delay unit to receive the input data; and a sample selector configured to receive an output from the delay unit and the output of the oscillator, and to output recovered data.