DRAM Capacitor Fin Structure with Concave-Convex Through Hole
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Solution Overview
Problem
The miniaturization of dynamic random access memory (DRAM) devices faces challenges in improving performance and yield due to the vulnerability of cup-shaped bottom electrode structures, which can collapse or crack during manufacturing, leading to reduced capacitance and increased risk of short circuits and leakage currents.
Innovation Solution
A DRAM device with a capacitor unit structure featuring a fin shape and a concave-convex through hole design, supported by a first and second support layer, and a composite dielectric layer, which increases the contact area and provides structural integrity, preventing collapse and enhancing capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If the bottom electrode structure is made thicker to prevent collapse, then structural stability improves, but the contact area with the dielectric layer decreases, reducing capacitance value
Solution Approach 1:
The through hole is designed with a concave-convex profile instead of a simple cylindrical shape, creating multiple surfaces (horizontal top surface, vertical sidewalls, and recessed regions) that collectively increase the contact area between the bottom electrode structure and dielectric layer, thereby increasing capacitance without requiring the bottom electrode to be thicker
Solution Approach 2:
The bottom electrode structure is nested within the concave-convex through hole, with the electrode conformally filling the complex geometry including recessed regions, maximizing the interface area between the electrode and surrounding dielectric materials
2Length of moving object
If the critical dimension is reduced for miniaturization, then device size decreases, but the bottom electrode structure becomes more prone to collapse or crack
Solution Approach 1:
The through hole geometry is locally optimized with concave and convex regions that provide mechanical support to the bottom electrode structure at critical locations, enhancing structural stability without increasing the overall critical dimension of the memory cell
Solution Approach 2:
The bottom electrode structure is formed with a cup shape that preliminarily provides mechanical support and stress distribution, preventing collapse during subsequent manufacturing processes even when the critical dimension is reduced for miniaturization
3Reliability
If the bottom electrode structure is made cup-shaped with high aspect ratio, then capacitance increases, but the structure becomes vulnerable to collapse or crack during manufacturing
Solution Approach 1:
The bottom electrode structure is formed as a thin film with a cup shape that conformally follows the concave-convex through hole geometry, providing both high capacitance through large surface area and structural stability through the distributed geometry that reduces stress concentration
Solution Approach 2:
The cup-shaped bottom electrode structure with curved surfaces conformally deposited on the concave-convex through hole provides mechanical strength through distributed curvature, preventing collapse while maintaining high capacitance through increased surface area
Data Source
AI summary
A DRAM device and its manufacturing method are provided. The DRAM device includes an interlayer dielectric layer and capacitor units framed on a substrate. The interlayer dielectric layer has capacitor unit accommodating through holes and includes a first support layer, a composite dielectric layer, and a second support layer sequentially formed on the substrate. The composite dielectric layer includes at least one first insulating layer and second insulating layer alternately stacked. Each capacitor unit accommodating through hole forms a first opening in the second insulating layer and forms a second opening communicating with the first opening in the first insulating layer. The second opening is wider than the first opening. The capacitor units are formed in the capacitor unit accommodating through holes. The top of the capacitor unit is higher than the top surface of the interlayer dielectric layer and defines a recessed region.