Dry Testing ISFET Arrays Using Equivalent Circuit Models

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Solution Overview

Problem

Existing methods for testing ion-sensitive field effect transistors (ISFETs) are impractical for high-volume manufacturing due to the need for wet testing, which is cumbersome, prone to contamination, and can cause corrosion, making dry testing necessary.

Innovation Solution

A method and device for dry testing ISFET arrays by connecting source terminals in common, applying test voltages, measuring currents, calculating resistance, and determining floating gate voltages to assess operational modes and integrity without the use of liquids.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If wet testing is used for ISFET arrays, then measurement accuracy is improved, but device reliability deteriorates due to corrosion and contamination

Engineering Contradiction:
Improvemeasurement accuracyVSAvoiddevice reliability
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The patent creates an electrical copy or model of the ISFET device behavior through equivalent circuit testing. Instead of testing the actual ISFET with liquids, the invention uses a simplified electrical equivalent circuit that replicates the key electrical characteristics, allowing indirect measurement of device performance without physical exposure to corrosive environments.

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The patent introduces an intermediary testing method using equivalent electrical circuits as a mediator between the test objectives and the actual ISFET device. This intermediary approach allows measurement of device characteristics through electrical modeling, preventing direct contact between the ISFET and potentially harmful testing liquids while still obtaining necessary performance data.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Measurement precision

If wet testing is used for ISFET arrays, then operational characteristics are accurately assessed, but manufacturing efficiency deteriorates due to cumbersome procedures

Engineering Contradiction:
Improveoperational characteristics assessmentVSAvoidmanufacturing efficiency
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The patent replaces complex wet testing procedures with a simplified electrical equivalent circuit model that copies the essential operational characteristics. This copying approach maintains measurement accuracy for key parameters while eliminating the need for complex liquid handling, cleaning, and drying procedures that reduce manufacturing throughput.

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The patent substitutes mechanical and chemical testing procedures (liquid application, flow control, cleaning mechanisms) with purely electrical testing methods. By replacing the mechanical wet testing system with an electrical equivalent circuit model, the invention eliminates cumbersome procedural steps while preserving the ability to assess operational characteristics.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Reliability

If conventional testing methods are used, then comprehensive device evaluation is achieved, but testing complexity increases due to multiple operational modes

Engineering Contradiction:
Improvedevice evaluation completenessVSAvoidtesting complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the complex multi-mode ISFET testing into simplified electrical equivalent circuit measurements. By dividing the testing into separate electrical measurements for different operational modes (using the equivalent circuit), the invention maintains comprehensive device evaluation while reducing the procedural complexity of implementing multiple testing sequences.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent creates a universal equivalent circuit model that can evaluate multiple operational modes of the ISFET through a single unified testing approach. This multi-functional equivalent circuit serves as a universal testing platform that simplifies the evaluation process by consolidating what would otherwise require separate complex testing procedures for each operational mode.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enables effective testing of ISFET arrays without exposure to fluids, preventing contamination and corrosion, and allowing for efficient high-volume manufacturing by optimizing the operational modes and integrity assessment.

Implementation Method 1

measuring corresponding first currents at the drain terminals produced by the first test voltages, and calculating resistance values based on the first test voltages and currents

Methodology Applied
Scientific EffectElectrical Resistance: Electrical Resistance

Data Source

PatentUS11231451B2Methods and apparatus for testing ISFET arrays
Publication Date: 2022.01.25 LIFE TECHNOLOGIES CORP
  • US11231451B2 patent drawing
  • US11231451B2 patent drawing
  • US11231451B2 patent drawing

AI summary

The invention provides testing of a chemically-sensitive transistor device, such as an ISFET device, without exposing the device to liquids. In one embodiment, the invention performs a first test to calculate a resistance of the transistor. Based on the resistance, the invention performs a second test to transition the testing transistor among a plurality of modes. Based on corresponding measurements, a floating gate voltage is then calculated with little or no circuitry overhead. In another embodiment, the parasitic capacitance of at least either the source or drain is used to bias the floating gate of an ISFET. A driving voltage and biasing current are applied to exploit the parasitic capacitance to test the functionality of the transistor.