Multi-layer Assist Feature Placement for DSA Density Control
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Solution Overview
Problem
Current directed self-assembly (DSA) techniques for semiconductor fabrication face challenges in controlling pattern density variations across wafers, particularly when dealing with multi-layer semiconductor devices, as existing assist features only consider single-plane density control, leading to film thickness variations and potential short circuits between layers.
Innovation Solution
A method is introduced that uses Boolean operations to determine overlapping regions between multiple layers in a semiconductor device design, generating assist features to ensure dimensional consistency by placing them in non-critical areas, thereby reducing film thickness variations and improving process variation tolerances.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If assist features are added to balance local pattern density, then film thickness variations are reduced, but short circuits between layers may occur due to insufficient consideration of multi-layer overlaps
Solution Approach 1:
The patent transitions from single-plane density control to multi-layer three-dimensional overlap analysis. By considering the vertical stacking of multiple metal layers and their horizontal projections, the system identifies regions where assist features would cause inter-layer short circuits, thus resolving the contradiction between thickness uniformity and reliability
Solution Approach 2:
The patent applies local quality by differentiating assist feature placement based on multi-layer overlap analysis. Different regions of the device layout receive different treatments: some regions get assist features for density balance, while overlap regions are excluded to prevent short circuits, thus achieving both thickness uniformity and reliability locally
2Device complexity
If state-of-the-art DSA assist features are used for single plane density control, then process simplicity is maintained, but film thickness variations persist across the wafer
Solution Approach 1:
The patent enhances the universality of assist feature generation by making it applicable to multi-layer semiconductor devices. The extended methodology maintains compatibility with existing single-layer processes while adding multi-layer overlap detection capabilities, thus improving thickness control without significantly increasing process complexity
3Productivity
If multi-layer semiconductor device designs are fabricated with conventional single-plane assist features, then manufacturing speed is maintained, but dimensional consistency across layers deteriorates
Solution Approach 1:
The patent applies preliminary action by performing multi-layer overlap analysis and assist feature optimization before the actual fabrication process. This pre-computation of optimal assist feature locations ensures dimensional consistency across layers while maintaining fabrication throughput, as the complex analysis is done in the design stage rather than during manufacturing
Data Source
AI summary
A method for local pattern density control of a device layout used by graphoepitaxy directed self-assembly (DSA) processes includes importing a multi-layer semiconductor device design into an assist feature system and determining overlapping regions between two or more layers in the multi-layer semiconductor device design using at least one Boolean operation. A fill for assist features is generated to provide dimensional consistency of device features by employing the overlapping regions to provide placement of the assist features. An updated device layout is stored in a memory device.