Digital Signal Processing Device Burst Transfer Delay Control

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Solution Overview

Problem

Existing digital signal processing devices for sound waveform data face limitations in achieving high-quality effects due to the periodicity of delay signals when all delay times are multiples of the burst length, leading to strong correlation and inadequate reverb quality.

Innovation Solution

A digital signal processing device that includes a first and second buffer memory, a DRAM for burst transferring audio data, and a delay unit that generates delay signals by combining delay times that are multiples of the sampling period with the burst length, allowing for varied delay times and improved reverb synthesis.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If delay time is set to a multiple of burst length for efficient memory access, then memory access efficiency is improved, but audio effect quality deteriorates due to strong correlation and periodicity in delay signals

Engineering Contradiction:
Improvememory access efficiencyVSAvoidaudio effect quality
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The delay time is segmented into two independent components: a coarse delay time (multiple of burst length) handled by burst transfer, and a fine delay time (less than burst length) handled by circular buffer. This segmentation allows each component to optimize for its specific function while combining to achieve the overall delay effect.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention adds a new dimension to delay time control by introducing fine delay time as an additional degree of freedom. Instead of relying solely on burst length multiples, the system now operates in a two-dimensional delay space (coarse × fine), enabling continuous delay adjustment while maintaining burst transfer efficiency.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Ease of manufacture

If all delay signals are multiples of burst length, then memory burst transfer is optimized, but periodicity causes strong correlation failing to achieve high-quality effects

Engineering Contradiction:
Improvememory transfer optimizationVSAvoidperiodicity and strong correlation
Core Design Contradiction:
Ease of manufactureVSObject-generated harmful factors

Solution Approach 1:

The invention introduces asymmetry into the delay time structure by combining a regular, periodic burst transfer pattern (coarse delay) with an irregular, variable fine delay component. This asymmetry breaks the strong correlation and periodicity that would otherwise result from uniform burst-length-multiple delays.

Inventive Principle:
Principle #4Asymmetry

Solution Approach 2:

The circular buffer acts as an intermediary between the burst transfer mechanism and the delay signal output. It absorbs and smooths the periodicity introduced by burst transfer, allowing the fine delay component to vary the timing and break correlations without affecting the efficient burst transfer to memory.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Device complexity

If delay time is restricted to multiples of sampling period, then digital signal processing is simplified, but flexibility in delay time adjustment is reduced

Engineering Contradiction:
Improveprocessing complexityVSAvoiddelay time flexibility
Core Design Contradiction:
Device complexityVSAdaptability or versatility

Solution Approach 1:

The invention makes the delay time dynamic and adjustable by separating it into a fixed coarse component (determined by burst transfer timing) and a variable fine component (adjusted within each burst period). This allows the system to adapt delay time continuously while maintaining the simplified structure of integer-sample processing.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS11816026B2Digital signal processing device and control method of digital signal processing device
Publication Date: 2023.11.14 KAWAI MUSICAL INSTR MFG CO LTD
  • US11816026B2 patent drawing
  • US11816026B2 patent drawing
  • US11816026B2 patent drawing

AI summary

A digital signal processing device includes: a delay means that delays audio data in units of sampling periods; and a control means that writes audio data to a first buffer memory one word at a time in sequence at a sampling period, performs control to burst transfer burst length audio data to a DRAM from the first buffer memory, performs control to burst transfer the burst length audio data to a second buffer memory from the DRAM, and outputs audio data to the delay means from the second buffer memory one word at a time in sequence at the sampling period, in which a delay time of audio data output by the delay means is determined by a combination of a delay time of multiple sampling period units depending on a burst length of the DRAM and a delay time of a sampling period unit of the delay means.