Low-Power DSP Architecture Bypassing Carry Propagate Addition
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Solution Overview
Problem
Digital signal processing systems face high power consumption due to the energy-intensive nature of multiply-accumulate (MAC) instructions, particularly in battery-powered devices and data-intensive applications like Convolutional Neural Networks and image/video processing, where MAC units consume 75-90% of the total energy.
Innovation Solution
A low-power digital signal processing system utilizing a programmable processor with a SIMD instruction set that executes multiply and multiply-accumulate instructions in carry-save or redundant binary format, incorporating a carry and sum pipeline to bypass the final adder and reduce power consumption by avoiding carry propagate addition, thereby optimizing MAC operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If carry propagate addition is performed in MAC units, then calculation accuracy is improved, but power consumption increases
Solution Approach 1:
The patent extracts and removes the final adder component from the MAC unit architecture. By eliminating this component, the system performs MAC operations using only multiplication and partial product accumulation without the final carry-propagate addition step, thereby reducing power consumption while maintaining sufficient calculation accuracy for DSP applications
Solution Approach 2:
The patent changes the output format parameter of MAC operations from standard binary format to carry-save format. This parameter change allows the system to skip the final addition step entirely, as the result is presented in a format where carries are saved separately rather than propagated, directly reducing the power consumption associated with final adder operations
2Measurement precision
If standard binary format is used for MAC results, then calculation precision is improved, but device complexity increases
Solution Approach 1:
The patent removes the final adder component from the MAC unit, simplifying the device architecture. By extracting this component, the system reduces device complexity and power consumption while accepting carry-save format output, which is sufficient for many DSP applications without requiring full binary conversion
Solution Approach 2:
Instead of converting the final result to standard binary format through addition, the patent inverts the approach by directly generating results in carry-save format. This inversion eliminates the need for complex final addition logic while providing results in a format that is directly usable in subsequent carry-save operations
Data Source
AI summary
The present disclosure relates to a system and method for use in a digital signal processing environment. Embodiments may include a programmable processor configured to execute an instruction set that includes multiply instructions and/or multiply-accumulate instructions that generate a result in carry-save format or redundant binary format. The instruction set may be executed at a single instruction, multiple data (SIMD) level.