Dataflow Graph Scheduling for DSP Execution
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Solution Overview
Problem
Existing digital signal processing (DSP) arrangements face inefficiencies in scheduling techniques, leading to suboptimal execution times and resource utilization, particularly when dealing with dataflow graphs containing finite and infinite state nodes.
Innovation Solution
The proposed solution involves transforming dataflow graphs through scheduling techniques such as unfolding, loop scheduling, and pipelining to create efficient schedules for concurrent execution, where finite state nodes are replicated and infinite state nodes are loop-scheduled, optimizing execution by classifying nodes based on their state duration and employing an unfolding factor to enhance throughput and reduce latency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If existing scheduling techniques are used for dataflow graphs, then implementation is simpler, but execution time is longer and resource utilization is lower
Solution Approach 1:
The patent segments the dataflow graph into finite state nodes and infinite state nodes, applying different scheduling strategies to each type. Finite state nodes are replicated and unfolded, while infinite state nodes are loop-scheduled, allowing optimized execution without requiring complete restructuring of the entire graph.
Solution Approach 2:
The patent introduces dynamic scheduling transforms including unfolding with configurable unfolding factors, loop scheduling with adjustable loop counts, and pipelining with variable pipeline stages. These dynamic parameters allow the scheduler to adapt to different performance requirements and resource constraints.
2Productivity
If finite state nodes are replicated for concurrent execution, then throughput increases, but latency increases
Solution Approach 1:
The patent implements periodic execution patterns through loop scheduling, where infinite state nodes are executed in repeated loops with configurable iteration counts. This periodic structure allows the system to achieve high throughput through multiple executions while managing latency through controlled loop unrolling and scheduling.
Solution Approach 2:
The patent performs preliminary unfolding of finite state nodes before execution, creating multiple replicated instances in advance. This preliminary action enables concurrent execution and high throughput, while the scheduling algorithm optimizes the activation sequence to manage latency effects.
3Productivity
If unfolding factor is increased to enhance throughput, then computational parallelism increases, but resource requirements increase
Solution Approach 1:
The patent uses parameter changes by introducing configurable unfolding factors that control the degree of replication. The scheduler can adjust the unfolding factor to balance throughput requirements against available computational resources, allowing flexible optimization without fixed resource commitments.
Solution Approach 2:
The patent applies partial unfolding where only necessary portions of the dataflow graph are replicated based on performance requirements. Instead of fully unfolding all nodes, the scheduler selectively applies unfolding to critical paths and nodes that provide the most throughput benefit per resource consumed.
Data Source
AI summary
Scheduling techniques transform dataflow graphs (DFGs), for example, of digital signal processing (DSP) arrangements of filters, into efficient schedules for concurrent execution on processing resources coupled to a memory. A DSP arrangement may be represented by an executable model having interconnected filters represented by model elements. The techniques may apply scheduling transforms according to a classification of the model elements based on a lifetime of their internal states (e.g., finite or infinite). Exemplary scheduling transforms may include unfolding, coordinated loop scheduling and pipelining to parallelize a DFG and enhance overall performance, i.e., reduce average sample execution time of the DSP arrangement. Notably, the scheduling transforms may aggregate (i.e., merge) multiple finite state model elements for concurrent execution and repeat execution of infinite state model elements to achieve the overall improved performance.


