DSP Frequency-Domain Data Transfer via Buffer Periodicity

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing frameworks for connecting digital signal processors (DSPs) are configured for time-domain data transfer, leading to inefficiencies and delays when processing frequency-domain data, as they require additional conversions and do not maintain the correct periodicity, resulting in lag and increased processing power consumption.

Innovation Solution

Configuring buffer sizes and bit rates to match the communication delay, allowing frequency-domain data to be transferred and processed without additional conversions, ensuring correct periodicity and reducing lag by setting buffer sizes according to the formula b=ch·ss·sr·fs,000,000 and link rate sr=b·1,000,000ss·ch·fs, which allows for efficient processing between DSP cores.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If existing time-domain frameworks are used for DSP connection, then data transfer between DSP cores is possible, but additional time-domain to frequency-domain conversions are required, increasing processing power consumption and introducing lag

Engineering Contradiction:
Improveprocessing power consumptionVSAvoidconversion operations
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The patent changes the fundamental parameter of data representation from time-domain to frequency-domain, allowing DSP cores to process and transfer data directly in the frequency domain without requiring conversion operations. This parameter change eliminates the need for additional processing steps and reduces energy consumption.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent extracts the unnecessary conversion operations from the data processing pipeline. By directly transferring frequency-domain data between DSP cores, the patent removes the intermediate time-domain conversion steps that were previously required, thereby reducing processing complexity and power consumption.

Inventive Principle:
Principle #2Taking out (Extraction)

2Speed

If existing time-domain frameworks are used for data transfer, then DSP cores can communicate, but the periodicity of frequency-domain data is not maintained, resulting in processing delays and lag

Engineering Contradiction:
Improvedata processing speedVSAvoidprocessing lag
Core Design Contradiction:
SpeedVSLoss of time

Solution Approach 1:

The patent changes the timing parameters of data transfer to match the periodicity requirements of frequency-domain processing. By configuring buffer sizes and transfer intervals according to the audio frame rate and FFT processing周期, the patent ensures that data is transferred and processed at the correct intervals, eliminating delays and maintaining processing speed.

Inventive Principle:
Principle #35Parameter changes

3Productivity

If frequency-domain data is transferred using time-domain configurations, then data can be communicated between DSP cores, but the data does not conform to expected buffer size and periodicity, requiring multiple chunks to be received before processing can begin

Engineering Contradiction:
Improvedata processing throughputVSAvoidwaiting time for buffer filling
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent changes the buffer configuration parameters to match frequency-domain data characteristics. By setting buffer sizes to correspond to complete audio frames in the frequency domain and configuring transfer rates to match the FFT processing periodicity, the patent ensures that each buffer receives a complete, processable unit of data, eliminating waiting time and maximizing throughput.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS11516582B1Splitting frequency-domain processing between multiple DSP cores
Publication Date: 2022.11.29 AMAZON TECH INC
  • US11516582B1 patent drawing
  • US11516582B1 patent drawing
  • US11516582B1 patent drawing

AI summary

An audio processing system may split frequency-domain processing between multiple DSP cores. Processing multi-channel audio data—e.g., from devices with multiple speakers—may require more computing power than available on a single DSP core. Such processing typically occurs in the frequency domain; DSP cores, however, typically communicate via ports configured for transferring data in the time-domain. Converting frequency-domain data into the time domain for transfer requires additional resources and introduces lag. Furthermore, transferring frequency-domain data may result in scheduling issues due to a mismatch between buffer size, bit rate, and the size of the frequency-domain data chunks transferred. However, the buffer size and bit rate may be artificially configured to transfer a chunk of frequency-domain data corresponding to a delay in the communication mechanism used by the DSP cores. In this manner, frequency-domain data can be transferred with a proper periodicity.