DSP Input Signal Testing via Programmable Interconnects

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Solution Overview

Problem

Conventional methods for testing input signals in programmable logic devices, such as DSP blocks, require additional multiplexers that increase circuit size and delay, and reduce performance by adding extra gates and load.

Innovation Solution

A method that uses programmable interconnects to couple input signals to DSP blocks, controlling paths within the circuit to maintain signal states and test output signals, allowing for transparent testing without altering stored selection signals, thereby minimizing circuit impact and performance reduction.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional multiplexers are used to test input signals, then input signal verification is achieved, but circuit size increases and performance decreases

Engineering Contradiction:
Improveinput signal verificationVSAvoidcircuit size
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The DSP block's existing internal multiplexers are utilized to perform testing functions. The same multiplexers that route signals during normal operation are repurposed to route test signals, allowing the circuit to test itself without requiring external testing hardware. This eliminates the need for additional multiplexers while maintaining testing capability.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The internal multiplexers of the DSP block are designed to serve dual purposes: they function as signal routing elements during normal DSP operation and as test signal routing elements during testing mode. By configuring the select lines of these multiplexers appropriately, the same hardware structures perform both operational and testing functions, reducing overall circuit complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If conventional multiplexers are used to test input signals, then input signal verification is achieved, but performance is reduced by adding extra gates and load

Engineering Contradiction:
Improveinput signal verificationVSAvoidperformance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The DSP block uses its own internal signal routing infrastructure to perform testing, avoiding the addition of external testing gates that would increase load and reduce performance. The internal multiplexers are already optimized for the DSP block's signal requirements, so using them for testing does not introduce additional performance penalties.

Inventive Principle:
Principle #25Self-service

3Reliability

If external multiplexers are used for testing, then input paths can be verified, but delay is increased from programmable interconnects to DSP block output

Engineering Contradiction:
Improveinput path verificationVSAvoidsignal delay
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The internal multiplexers act as intermediaries that are already integrated into the DSP block's signal path. By using these existing intermediary structures for testing rather than introducing external multiplexers, the signal delay is minimized because the test signals traverse the same optimized internal routing paths that are already part of the DSP block's architecture.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS7831415B1Circuit for testing input signals and a method of testing input signals coupled to a circuit
Publication Date: 2010.11.09 XILINX INC
  • US7831415B1 patent drawing
  • US7831415B1 patent drawing
  • US7831415B1 patent drawing

AI summary

A method of testing input signals coupled to a circuit for performing a predetermined function is disclosed. The method comprises coupling input signals to inputs of the circuit by way of programmable interconnects; controlling the paths of the input signals within the circuit from the inputs to an output of the circuit; maintaining the states of the input signals coupled to the inputs of the circuit and routed to the output of the circuit; and testing output signals of the circuit to determine whether the correct input signals were provided to the inputs of the circuit by way of the programmable interconnects. A device having programmable logic which enables testing of input signals is also disclosed.