Multi-core DSP Motion Estimation Pipeline for Video Compression
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Solution Overview
Problem
Conventional video coding techniques face limitations in finding the best motion vector for motion estimation, especially when dealing with multiple reference frames, as they are complex and can only represent a single motion vector at a time, lacking efficiency in block size division and search patterns.
Innovation Solution
A method and system utilizing multiple pipeline stages on a multi-core digital signal processor to perform motion estimation by considering motion vectors of neighboring macro blocks across current and co-located frames, employing integer-pixel and fractional-pixel estimation to find the best predictive motion vector through cost-based searches and interpolation processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conventional n-stage search method is used for motion estimation, then a single motion vector can be found, but the method cannot handle multiple reference frames efficiently and is limited to single motion vector representation
Solution Approach 1:
The motion estimation process is divided into multiple independent pipeline stages, where each stage handles a specific reference frame. The first pipeline stage processes the first reference frame, the second pipeline stage processes the second reference frame, and so on. This segmentation allows the system to handle multiple reference frames simultaneously by distributing the workload across parallel pipeline stages, thereby improving adaptability without proportionally increasing complexity.
Solution Approach 2:
The invention adds a temporal dimension to the motion estimation process by introducing multiple pipeline stages that operate concurrently on different reference frames. Instead of sequentially processing each reference frame (single dimension), the system processes multiple reference frames in parallel across different pipeline stages (multiple dimensions), enabling efficient handling of multiple reference frames while maintaining manageable complexity through structured parallelism.
2Measurement precision
If macro blocks are divided into smaller blocks for motion estimation, then better match accuracy can be achieved, but the number of divisions is limited up to the size of the macro block
Solution Approach 1:
Each pipeline stage is further segmented into multiple processing units that can independently process different macro blocks or sub-blocks within a pipeline stage. This fine-grained segmentation allows for more flexible block division beyond the traditional macro block size limitations, enabling better match accuracy while maintaining processing efficiency through parallel execution of multiple segmentation operations across different pipeline stages.
3Productivity
If multiple pipeline stages are used for motion estimation on multi-core DSP, then processing efficiency and accuracy are improved, but the system complexity and implementation difficulty increase
Solution Approach 1:
The multi-core DSP system is segmented with each core assigned to specific pipeline stages or groups of stages. This segmentation allows the complex multi-stage pipeline to be distributed across multiple cores, with each core handling a manageable subset of the overall processing task. The segmentation approach maintains processing efficiency by utilizing all cores simultaneously while reducing the implementation complexity on each individual core.
Solution Approach 2:
The pipeline stages are designed with universal processing capabilities that can handle multiple reference frames and different macro block configurations using the same fundamental processing logic. This multi-functionality reduces system complexity by reusing the same hardware structures and processing algorithms across different pipeline stages and reference frames, rather than requiring dedicated specialized units for each function.
Data Source
AI summary
System and method of mapping multiple reference frame motion estimation on a multi core digital signal processor is disclosed. The method includes considering at least one motion vector of a plurality of neighbouring macro blocks present in a current frame and a co-located frame to find a best prediction point motion vector set, collecting a best data block among a plurality of data blocks from a plurality of reference frames according to a plurality of sets of motion vectors at a first pipeline stage, transmitting a data searched related to the plurality of sets of motion vectors from the second level of memory to a first level of memory of a second digital signal processor at a second pipeline stage and finding a best motion vector by utilizing a cost based search on the second digital signal processor is performed at third pipeline stage.


