DSP Block Rounding Circuit Using Shared Adder Hardware
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Solution Overview
Problem
Existing rounding implementations in digital signal processing blocks of programmable logic devices require additional circuitry, which increases complexity and resource usage.
Innovation Solution
Utilizing existing adder circuitry in specialized processing blocks for rounding functions by incorporating a multiplexer to select either feedback input for accumulation or a rounding constant, and employing rounding masks for various rounding modes, thereby minimizing hardware requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If existing rounding implementations are used in DSP blocks, then rounding functionality is achieved, but additional circuitry is required which increases hardware complexity and resource usage
Solution Approach 1:
The patent makes the existing adder circuit perform dual functions: accumulation (adding feedback input) and rounding (adding rounding constant). The same adder hardware is used for both purposes by selectively changing its second input through the multiplexer, eliminating the need for separate rounding circuitry and reducing hardware complexity while maintaining full rounding functionality
Solution Approach 2:
The patent enables the existing adder and multiplexer circuitry to serve the rounding function without requiring external dedicated rounding components. The adder's existing feedback mechanism is repurposed to also handle rounding constant addition, making the circuit self-sufficient for both accumulation and rounding operations
2Adaptability or versatility
If dedicated rounding circuitry is added to DSP blocks, then rounding operations can be performed, but hardware resources are consumed
Solution Approach 1:
The multiplexer's existing input selection capability is extended to include a rounding constant input in addition to the feedback input. This allows the same hardware resources (adder and multiplexer) to handle both accumulation and rounding operations, providing full rounding versatility without consuming additional hardware resources
Solution Approach 2:
The patent merges the rounding function with the existing accumulation function by combining their input paths through the multiplexer. Both the feedback input (for accumulation) and rounding constant input (for rounding) are merged into the same adder circuit, allowing both functions to share hardware resources efficiently
Data Source
AI summary
A specialized processing block for a configurable integrated circuit device includes circuitry for performing multiplications and sums thereof, as well as circuitry for rounding the result. The rounding circuitry reuses an adder that is also available, in other configurations, for accumulation of the result. Rounding is performed by adding a constant to the result and then truncating at the bit position at which rounding is desired. The constant may be entered by a user, or may be derived based on a desired rounding method from mask data entered by the user to identify the rounding bit position.