Microprocessor Shifting and Rounding Single Instruction

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing digital signal processors (DSPs) face complexity in performing shifting and rounding operations, which can be improved for more efficient data manipulation.

Innovation Solution

A method and system within a DSP that performs shifting and rounding operations using a single instruction, where data is shifted right by an encoded bit value, a unitary integer is added, and further shifted to round the data to the next integer value, eliminating the need for a rounding module.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If traditional separate shifting and rounding modules are used in DSP, then rounding operations can be performed, but device complexity increases and cost increases

Engineering Contradiction:
Improverounding module complexityVSAvoidrounding operation capability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent merges the shifting operation and rounding operation into a single integrated instruction. The rounding function is achieved by combining a shift operation with an addition of 0.5 (implemented through bit manipulation), eliminating the need for a separate hardware rounding module. This is accomplished by executing a shift instruction that simultaneously performs the shift and adds the rounding offset in one operation.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The shift instruction is designed to perform multiple functions: it can perform both the data shifting operation and the rounding operation using the same instruction format and execution pathway. By making the shift instruction universal, the processor can handle both shifting and rounding without requiring dedicated hardware for each function, thereby reducing device complexity while maintaining full rounding capability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Productivity

If multiple instructions are used for shifting and rounding operations, then operations can be performed accurately, but productivity decreases

Engineering Contradiction:
Improveshifting and rounding operation speedVSAvoidrounding accuracy
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent combines multiple operations (shifting and rounding) into a single atomic instruction that executes in one cycle. The rounding accuracy is maintained by implementing the rounding offset addition (adding 0.5 before truncation) within the same instruction execution flow, ensuring numerical precision is not compromised while achieving single-instruction execution.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The rounding offset (0.5) is pre-calculated and embedded into the instruction execution pathway. Before the final truncation occurs, the rounding offset is automatically added to the shifted value, ensuring correct rounding behavior. This preliminary action of adding the offset is integrated into the single instruction execution, maintaining accuracy while improving productivity.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentEP2074509B1Method and system to perform shifting and rounding operations within a microprocessor
Publication Date: 2012.03.07 QUALCOMM INC
  • EP2074509B1 patent drawingFigure 1
  • EP2074509B1 patent drawingFigure 2
  • EP2074509B1 patent drawingFigure 3

AI summary

A method and system to perform shifting and rounding operations within a microprocessor, such as, for example, a digital signal processor, during execution of a single instruction are described. An instruction to shift and round data within a source register unit of a register file structure is received within a processing unit. The instruction includes a shifting bit value indicating the bit amount for a right shift operation and is subsequently executed to shift data within the source register unit to the right by an encoded bit value, calculated by subtracting a single bit from the shifting bit value contained within the instruction. A predetermined bit extension is further inserted within the vacated bit positions adjacent to the shifted data. Subsequently, an addition operation is performed on the shifted data and a unitary integer value is added to the shifted data to obtain resulting data. Finally, the resulting data is further shifted to the right by a single bit value and a predetermined bit extension is inserted within the vacated bit position to obtain the final rounded data results to be stored within a destination register unit.