DSP Waveform Synthesis for Arbitrary Baud Rates With Fixed-Rate DACs

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Solution Overview

Problem

Conventional signal sources face challenges in synthesizing waveforms for arbitrary baud rates, requiring time-consuming recalibration and complex design with high-speed DACs that vary across a full octave in frequency, leading to synchronization issues and artifacts.

Innovation Solution

The use of digital signal processing (DSP) with a fixed or narrowly tunable rate DAC for asynchronous waveform synthesis, employing fractional replication and interpolation techniques to up-sample waveforms, allowing dynamic baud rate changes without recalibration and introducing impairments like spread spectrum clocking for stress testing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If synchronous waveform generation with variable sample rate DAC is used to support arbitrary baud rates, then waveform generation flexibility is improved, but device complexity and calibration time increase

Engineering Contradiction:

Improvewaveform generation flexibilityVSAvoidDAC design complexity

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent applies dynamics by making the interpolation factor variable rather than fixed. The system uses a variable interpolation factor that can be dynamically adjusted to match different baud rates, allowing the fixed sample rate DAC to adapt to various waveform generation requirements without requiring a variable sample rate DAC.

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The patent introduces an interpolation module as an intermediary between the fixed sample rate DAC and the output. This interpolation module acts as a mediator that converts the fixed sample rate output into variable baud rate waveforms, eliminating the need for a complex variable sample rate DAC while maintaining waveform generation flexibility.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Adaptability or versatility

If variable sample rate DAC is used to support different baud rates, then waveform synthesis adaptability is improved, but calibration time increases

Engineering Contradiction:

Improvebaud rate adaptabilityVSAvoidrecalibration time

Core Design Contradiction:

Adaptability or versatilityVSLoss of time

Solution Approach 1:

The patent performs preliminary calibration at a single fixed sample rate for the DAC. By calibrating once at the fixed sample rate and using interpolation to generate different baud rates, the system eliminates the need for time-consuming recalibration when changing baud rates, as the interpolation operation does not require recalibration.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The system dynamically adjusts the interpolation factor to change baud rates without requiring dynamic adjustment of the DAC sample rate. This dynamic interpolation approach allows rapid baud rate switching without the recalibration time penalty associated with variable sample rate DACs.

Inventive Principle:

Principle #15Dynamics

3Ease of manufacture

If integer interpolation is used to up-sample waveforms, then implementation simplicity is improved, but waveform fidelity deteriorates

Engineering Contradiction:

Improveimplementation simplicityVSAvoidwaveform fidelity

Core Design Contradiction:

Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent changes the interpolation parameter from simple integer multiplication to a more sophisticated fractional interpolation approach. By using interpolation factors that are not limited to integers and by applying appropriate filtering, the system improves waveform fidelity while maintaining reasonable implementation complexity.

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The patent combines multiple processing stages including interpolation and filtering to create a composite signal processing pipeline. This composite approach integrates simple interpolation with filtering operations to achieve high waveform fidelity while keeping individual components manageable in complexity.

Inventive Principle:

Principle #40Composite materials

4Device complexity

If fixed sample rate DAC is used with DSP interpolation, then hardware complexity is reduced, but processing requirements increase

Engineering Contradiction:

Improvehardware complexityVSAvoidDSP processing requirements

Core Design Contradiction:

Device complexityVSExtent of automation

Solution Approach 1:

The patent replaces the mechanical complexity of a variable sample rate DAC with a fixed sample rate DAC combined with digital signal processing. By substituting the analog/digital conversion complexity with digital interpolation processing, the system reduces hardware complexity while shifting the complexity to the DSP domain, which is generally more flexible and programmable.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentEP3675412B1Digital signal processing waveform synthesis for fixed sample rate signal sources

Publication Date: 2023.09.13 TEKTRONIX INC

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AI summary

A test and measurement instrument including a digital-to-analog converter having an output sample rate configured to receive a digital sample waveform and a reference clock and output an analog waveform at the sample rate, a waveform synthesizer configured to receive an input waveform having a baud rate and output a digital sample waveform having a baud rate less than the sample rate of the digital-to-analog converter, and a port configured to output the analog waveform.