DSSS Signal Encoding Circuit Using PN Code Multiplexing
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Solution Overview
Problem
Conventional implementations of Code Position Modulation (CPM) systems face challenges in efficiently encoding and decoding long PN codes due to high clock rates and hardware complexity, with existing methods requiring excessive clock cycles and hardware resources, and being limited by the need for large memory and complex shift registers.
Innovation Solution
A novel approach using a transmitter-coding block and receiver-coding block with a data alignment block, employing a single high-frequency oversampling correlator or switched code phase mode decoder to decode all alignments of code phased symbols, allowing for efficient encoding and decoding of longer codes without excessive clock rates or hardware, utilizing a multiplexer and shift registers to generate and rotate PN codes effectively.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional CPM systems use QPSK modulation with circularly shifted PN codes, then data can be transmitted with spreading, but the receiver hardware becomes complex and power consumption increases
Solution Approach 1:
The patent changes the modulation parameter from QPSK to BPSK, simplifying the receiver hardware while maintaining signal spreading capability through code position modulation. This parameter change reduces the complexity of phase detection circuits and allows for lower power consumption in the receiver.
Solution Approach 2:
The patent extracts the data encoding from the phase modulation domain and relocates it to the time-domain position of the PN code. By taking out the phase modulation complexity and replacing it with position-based encoding, the system achieves spreading without requiring complex quadrature phase detection hardware.
2Adaptability or versatility
If lookup tables are used to generate circularly shifted PN code sequences, then all required shifts can be stored, but a large amount of memory is required
Solution Approach 1:
The patent segments the PN code generation into a base sequence stored in memory and dynamic position shifting performed by a shift register. Instead of storing all possible shifted versions, the system stores only the base sequence and generates variations through time-domain shifting, dramatically reducing memory requirements while maintaining adaptability.
Solution Approach 2:
The patent introduces dynamic shifting of the PN code position based on data encoding requirements. Rather than statically storing all possible code variations, the system dynamically generates the required shifted sequences on-demand using a shift register controlled by the data bits, reducing memory usage while maintaining code variety.
3Ease of operation
If circular shift registers with down-counters are used to generate shifted codes, then code shifting can be implemented, but cost and complexity increase
Solution Approach 1:
The patent merges the functions of the shift register and down-counter into a unified structure where the shift register itself performs the counting function through its shift operations. By combining these separate components, the system achieves code shifting capability while reducing the overall encoder complexity and component count.
Solution Approach 2:
The patent makes the shift register multi-functional by using it both for code sequence generation and for position shifting based on data encoding. This single component performs multiple functions that previously required separate dedicated circuits, thereby reducing encoder complexity while maintaining full code shifting capability.
4Productivity
If LFSR is used to generate PN codes, then code sequences can be generated, but the available codes are constrained to a small pre-determined set
Solution Approach 1:
The patent adds a time-domain position dimension to the code generation. Instead of being limited to selecting from a fixed set of LFSR-generated sequences, the system can now generate any shifted version of the base PN code by varying the position parameter. This dimensional extension dramatically increases code sequence versatility while maintaining efficient generation through the same LFSR structure.
Data Source
AI summary
Disclosed is a circuit for encoding code phase modulated (CPM) signals, including a code storage device storing one or more PN codes, a counter, and a multiplexer coupled to the code storage device and the counter, the multiplexer to provide an encoded CPM sequence using the one or more reference codes.