DST-VII Transform Core for Faster Integer Video Decoding
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Solution Overview
Problem
The lack of efficient fast implementation of DST-7 limits its application in practical video codec implementations, and existing methods fail to provide identical results as matrix multiplication based implementations, especially in scenarios requiring 16-bit intermediate operations and integer operations.
Innovation Solution
A method for decoding a video sequence using a discrete sine transform (DST) type-VII transform core involves generating tuples of transform core elements and performing transforms based on these elements, reducing the number of multiplication operations required while maintaining similar results.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If conventional transform coding methods (DST-II, DST-III, DST-VIII) are used, then transform coding functionality is provided, but processing speed is insufficient for real-time 4K/8K video applications
Solution Approach 1:
The patent segments the transform coding process by separating the core transform operations into distinct kernel functions (e.g., dst7_4x4, dst7_8x8) that can be independently optimized and executed through instruction fusion, allowing parallel processing and improving overall transform processing speed
Solution Approach 2:
The patent merges multiple transform operations and related processing steps into fused instruction sequences, combining prediction, transform, and quantization operations into unified computational blocks that reduce overhead and improve processing efficiency for real-time video applications
2Productivity
If existing DST implementations are used, then transform coding is achieved, but the number of processing cycles is too high for real-time 4K/8K video
Solution Approach 1:
The patent performs preliminary preparation by precomputing and storing transform kernels in lookup tables, and by organizing data in advance to match optimal processing patterns, reducing the number of cycles required during actual real-time video transform operations
Solution Approach 2:
The patent ensures continuous processing by eliminating idle cycles through instruction fusion and overlapping operations, maintaining uninterrupted transform processing pipelines that maximize processor utilization and reduce total processing time for 4K/8K video streams
3Speed
If standard transform coding procedures are followed, then coding functionality is provided, but processing speed does not meet real-time 4K/8K video requirements
Solution Approach 1:
The patent implements dynamic processing by selecting and switching between different DST kernel implementations based on block size, video sequence characteristics, and processor state, allowing the system to adaptively optimize processing speed while maintaining reliable real-time performance across varying conditions
Data Source
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AI summary
A method and apparatus for decoding a video sequence using a discrete sine transform (DST) type-VII transform core includes generating a set of tuples of transform core elements associated with an n-point DST-VII transform core. A first sum of a first subset of transform core elements of a first tuple is equal to a second sum of a second subset of remaining transform core elements of the first tuple. The n-point DST-VII transform core is generated based on generating the set of tuples of transform core elements. A transform on a block is performed using the n-point DST-VII transform core.