DTC Current Compensation for Input Clock Period Linearity

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Solution Overview

Problem

Digital-to-time converters (DTCs) exhibit non-linearity when the input clock changes between lower and higher periods, leading to unacceptable operational deviations, particularly in applications like fractional-N phase locked loops.

Innovation Solution

Implementing a correction-component in the DTC circuit to compensate for the difference in current magnitudes drawn during lower and higher periods, using a digital-to-analog converter (DAC) to draw a controlled current from the power supply, thereby maintaining equal average current magnitudes across varying periods.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If the DTC operates with varying input clock periods, then the DTC can adapt to different frequency requirements, but non-linearity increases in the output delay

Engineering Contradiction:

Improvefrequency adaptationVSAvoidoutput delay linearity

Core Design Contradiction:

Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

The patent changes the current magnitude parameter dynamically based on the input clock period. A correction component adjusts the current drawn from the power supply according to the detected clock period, using different current magnitudes for lower and higher periods to compensate for non-linearity effects

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The patent implements a feedback mechanism where the input clock period is detected and used to control the correction component. The system continuously monitors the clock period and adjusts the current magnitude accordingly, creating a closed-loop control system that maintains linearity across varying frequencies

Inventive Principle:

Principle #23Feedback

2Adaptability or versatility

If the input clock period varies between lower and higher values, then frequency flexibility is achieved, but current magnitude inconsistency causes non-linearity

Engineering Contradiction:

Improveclock period flexibilityVSAvoidcurrent magnitude consistency

Core Design Contradiction:

Adaptability or versatilityVSReliability

Solution Approach 1:

The patent makes the current magnitude dynamic rather than fixed. The correction component adjusts the current drawn from the power supply based on the detected clock period, transitioning between different current magnitudes to maintain consistent average current despite varying clock periods

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The correction component acts as a counterbalancing mechanism that compensates for the harmful effect of current magnitude inconsistency. By introducing an opposing current adjustment, the system neutralizes the non-linearity caused by varying clock periods

Inventive Principle:

Principle #8Anti-weight (Counterweight)

Data Source

PatentUS20250323652A1Reducing non-linearity in a digital-to-time converter (DTC) when an input clock changes between lower and higher periods

Publication Date: 2025.10.16 NINGBO AURA SEMICON CO LTD

AI summary

A digital-to-time converter (DTC) is used to generate code dependent delays in fractional clock dividers by generating a fractional output clock, corresponding to a reference signal, from a divided signal having different time periods for obtaining the fractional output clock. The DTC contains an input buffer coupled to receive the divided signal and to generate an intermediate output, wherein the current drawn from a power supply contains a first average current magnitude when the divided signal has a lower time period, and a second average current magnitude when the divided signal has a higher time period. A correction-component compensates for the difference of the first average current magnitude and the second average current magnitude to improve linearity of the DTC.