Deep Trench Capacitor Encapsulation for Cavity Fill and Warpage Control

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Solution Overview

Problem

The encapsulation of deep trench capacitors (DTCs) in package substrates faces challenges due to thickness mismatches between DTCs and core layers, leading to cavity filling difficulties and assembly issues such as voiding, component shifting, and panel warpage, which affect yield and quality.

Innovation Solution

Employing a non-conductive polymer material or a double layer of dielectrics with differing material characteristics for encapsulation, and using techniques like stencil-based screen printing or inkjet printing to fill the cavity, followed by curing and forming buildup layers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a single layer dielectric or epoxy mold compound is used for encapsulation, then the process is simple, but cavity filling difficulties occur due to thickness mismatch between DTC and core layer

Engineering Contradiction:
Improveencapsulation process complexityVSAvoidcavity filling quality
Core Design Contradiction:
Device complexityVSManufacturing precision

Solution Approach 1:

The encapsulation structure is divided into multiple functional layers: a first dielectric layer for filling the cavity around the DTC, and a second dielectric layer for planarization and connection. This segmentation allows each layer to be optimized independently for its specific function, resolving the cavity filling issue while maintaining process manageability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The solution transitions from a single-layer encapsulation approach to a multi-layer vertical structure. By adding the vertical dimension of layer stacking, the patent addresses the thickness mismatch problem between the shallow DTC cavity and the thicker core layer, enabling proper filling and connection without compromising manufacturing precision.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Stability of the object's composition

If high filler loading epoxy material is used, then viscosity increases making lamination difficult, but CTE decreases improving thermal stability

Engineering Contradiction:
Improvecoefficient of thermal expansion (CTE)VSAvoidlamination processability
Core Design Contradiction:
Stability of the object's compositionVSEase of manufacture

Solution Approach 1:

The encapsulation is segmented into two dielectric layers with different material compositions. The first layer uses high filler loading material for low CTE and thermal stability, while the second layer uses lower filler loading material for easier lamination and planarization, thus resolving the contradiction between thermal stability and manufacturability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the encapsulation structure use materials with different properties optimized for their specific locations. The first dielectric layer near the DTC uses high filler loading for thermal stability, while the second layer at the top uses lower filler loading for ease of lamination and connection, achieving local optimization of both CTE and manufacturability.

Inventive Principle:
Principle #3Local quality

3Ease of manufacture

If low filler loading epoxy material is used, then viscosity decreases improving lamination, but CTE increases causing panel warpage

Engineering Contradiction:
Improvelamination processabilityVSAvoidcoefficient of thermal expansion (CTE)
Core Design Contradiction:
Ease of manufactureVSStability of the object's composition

Solution Approach 1:

The encapsulation is divided into two layers where the second layer uses low filler loading material for easy lamination and planarization, while the first layer provides thermal stability. This segmentation allows the low CTE requirement to be met by the first layer while the second layer provides manufacturing ease, resolving the contradiction.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The first dielectric layer acts as an intermediary between the DTC cavity and the second dielectric layer. It provides the thermal stability (low CTE) needed to prevent warpage, while allowing the second layer to use lower filler loading material for easier lamination and connection processes.

Inventive Principle:
Principle #24Intermediary (Mediator)

4Manufacturing precision

If DTC thickness is increased to match core layer thickness, then cavity filling improves, but fabrication complexity increases

Engineering Contradiction:
Improvecavity filling qualityVSAvoidDTC fabrication process
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

Instead of increasing DTC thickness in the vertical dimension to match the core layer, the patent uses a multi-layer dielectric structure that fills the existing shallow cavity and extends upward. This dimensional approach allows proper cavity filling without modifying the DTC fabrication process.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The solution extracts the thickness matching problem from the DTC fabrication process itself and addresses it separately through the multi-layer dielectric encapsulation structure. This separates the cavity filling function from the DTC manufacturing, avoiding increased fabrication complexity while achieving proper alignment and filling.

Inventive Principle:
Principle #2Taking out (Extraction)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enhances encapsulation quality, reduces manufacturing costs, and improves yield by preventing warpage and ensuring proper alignment of components, thus optimizing the performance of embedded capacitors.

Implementation Method 1

followed by curing

Methodology Applied
Scientific EffectPhotopolymerization: Photopolymerisation

Data Source

PatentUS20250218984A1Encapsulation techniques for components embedded in a core layer of a package substrate
Publication Date: 2025.07.03 INTEL CORP
  • US20250218984A1 patent drawing
  • US20250218984A1 patent drawing
  • US20250218984A1 patent drawing

AI summary

In embodiments herein, a circuit component (e.g., a deep trench capacitor) is embedded within a core layer of a substrate. The circuit component may be encapsulated by multiple (e.g., two) layers of dielectrics or by a polymer material.