DTI-Ring Pixel Layout for Short-Channel Noise Reduction
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Solution Overview
Problem
As image sensors are scaled down, pixel devices have limited room, leading to degraded performance due to short channel effects and increased noise levels, which are not effectively addressed by existing technologies.
Innovation Solution
A CMOS image sensor design incorporating a deep trench isolation (DTI) structure, where the pixel device is positioned over a DTI structure, enlarging the room for the pixel device and utilizing an SOI device configuration to improve performance by reducing short channel effects and noise.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If image sensors are scaled down to increase integration density, then device integration density is improved, but pixel device performance deteriorates due to short channel effects and increased noise levels
Solution Approach 1:
The patent introduces a vertical dimension by forming a deep trench isolation structure that extends from the front surface to the back surface of the substrate. This vertical isolation allows the pixel device to be positioned over the DTI structure, effectively utilizing the third dimension (depth) to increase integration density without compromising horizontal pixel dimensions and performance
Solution Approach 2:
The deep trench isolation structure acts as an intermediary element between adjacent pixel devices. By providing electrical isolation through the DTI structure filled with conductive material, the patent enables higher integration density while preventing performance degradation from interference and noise between neighboring pixels
2Productivity
If pixel device dimensions are reduced to increase integration density, then device integration density is improved, but short channel effects increase degrading device performance
Solution Approach 1:
By utilizing the vertical dimension with deep trench isolation extending through the substrate, the patent allows reduced horizontal pixel dimensions for higher integration density while maintaining adequate channel length control. The DTI structure provides electrical isolation that mitigates short channel effects even as pixel dimensions are reduced
3Productivity
If pixel device dimensions are reduced to increase integration density, then device integration density is improved, but noise levels increase degrading device performance
Solution Approach 1:
The deep trench isolation structure serves as an intermediary that provides electrical isolation between adjacent pixel devices. This isolation reduces noise levels by preventing interference from neighboring pixels, enabling higher integration density without the noise penalties that would normally accompany reduced pixel dimensions
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The DTI structure enhances pixel device performance by reducing short channel effects and noise levels, allowing for higher device integration density and lower power consumption.
Implementation Method 1
a photodiode configured to convert radiation that enters the substrate from the back-side into an electrical signal
Data Source
AI summary
The present disclosure relates to a CMOS image sensor. The image sensor comprises a pixel region comprising a photodiode disposed within a substrate. A deep trench isolation (DTI) ring encloses the photodiode from top view and extends from a back-side to a first position within the substrate from cross-sectional view. A pair of shallow trench isolation (STI) structures is respectively disposed at an inner periphery and an outer periphery sandwiching the DTI ring from top view and extends from a front-side to a second position within the substrate from cross-sectional view. A pixel device is disposed at the front-side of the substrate directly overlying the DTI ring. The pixel device comprises a gate electrode disposed over the substrate and a pair of source/drain (S/D) regions disposed within the substrate and reaching on a top surface of the DTI ring.