Deep Trench Isolation Shared Contact for SRAM
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Solution Overview
Problem
Conventional integrated circuit devices face challenges with high costs and performance variations due to the use of both shallow trench isolation (STI) and deep trench isolation (DTI) regions, leading to FET width misalignment and threshold voltage variations.
Innovation Solution
The implementation of deep trench isolation (DTI) regions for both inter-well and intra-well isolation, combined with a shared contact to a junction between diffusion regions and an underlying floating well section, eliminates the need for discrete supply voltage contacts and reduces costs by using a single shared contact.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If both shallow trench isolation (STI) and deep trench isolation (DTI) regions are used for inter-well and intra-well isolation, then isolation functionality is achieved, but manufacturing cost increases and FET width variations occur due to misalignment
Solution Approach 1:
The patent applies universality by using deep trench isolation (DTI) regions to perform both inter-well isolation and intra-well isolation functions that were previously handled by separate STI and DTI structures. This single structure type replaces the need for two different isolation techniques, reducing manufacturing complexity and cost while maintaining proper isolation functionality between different conductivity type FETs and same conductivity type FETs
Solution Approach 2:
The patent applies local quality by positioning DTI regions at specific locations to achieve both inter-well and intra-well isolation. The DTI regions are strategically placed to provide isolation where needed while maintaining consistent FET widths, with the understanding that not all isolation locations require the same depth or structure type
2Reliability
If both shallow trench isolation (STI) and deep trench isolation (DTI) regions are used, then isolation is achieved, but FET width variations and threshold voltage variations occur
Solution Approach 1:
By using DTI regions universally for both inter-well and intra-well isolation, the patent eliminates the misalignment issues that arise when combining STI and DTI structures. The consistent use of DTI across all isolation needs ensures uniform FET width definitions and prevents threshold voltage variations caused by alignment discrepancies between different isolation structure types
Solution Approach 2:
The patent applies homogeneity by using the same DTI structure type for all isolation requirements throughout the device. This uniform approach ensures consistent electrical characteristics across all FETs, eliminating the heterogeneity introduced by mixing STI and DTI structures, which would otherwise cause variations in FET width and threshold voltage
3Reliability
If discrete supply voltage contacts are used for each floating well section, then proper electrical connection is achieved, but device area and manufacturing cost increase
Solution Approach 1:
The patent applies merging by combining multiple supply voltage connections into a single shared contact. Instead of providing separate contacts for each floating well section, the DTI structure enables adjacent diffusion regions and floating well sections to share a common contact point, reducing the total number of contacts required and minimizing device area while maintaining proper electrical connection to the supply voltage
Solution Approach 2:
The shared contact structure serves multiple functions simultaneously: it provides supply voltage connection to multiple floating well sections and diffusion regions, acts as an electrical common, and reduces the overall contact count. This multi-functional approach eliminates the need for discrete contacts at each floating well section, optimizing both area and manufacturing cost
Data Source
AI summary
Disclosed are embodiments of an improved integrated circuit device structure (e.g., a static random access memory array structure or other integrated circuit device structure incorporating both P-type and N-type devices) and a method of forming the structure that uses DTI regions for all inter-well and intra-well isolation and, thereby provides a low-cost isolation scheme that avoids FET width variations due to STI-DTI misalignment. Furthermore, because the DTI regions used for intra-well isolation effectively create some floating well sections, which must each be connected to a supply voltage (e.g., Vdd) to prevent threshold voltage (Vt) variations, the disclosed integrated circuit device also includes a shared contact to a junction between the diffusion regions of adjacent devices and an underlying floating well section. This shared contact eliminates the cost and area penalties that would be incurred if a discrete supply voltage contact was required for each floating well section.