Dual-Actuator Storage Mapping for Constant Data Rate
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Solution Overview
Problem
Conventional data storage devices experience varying data rates across their logical block address space, leading to inconsistent performance, particularly in surveillance systems where constant data rates are required to support multiple video sources effectively.
Innovation Solution
The implementation of a dual-actuator system with a complementary logical-physical mapping scheme, where even and odd logical elements are mapped to physical elements on separate disc surfaces, allowing for concurrent data storage and distribution of workload across surfaces, thereby maintaining a substantially constant data rate across the entire logical space.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional single-actuator systems are used, then device complexity is reduced, but data rate consistency across logical block address space deteriorates
Solution Approach 1:
The patent divides the storage system into multiple independent actuators (first actuator and second actuator), each responsible for specific data surfaces. This segmentation allows concurrent data operations across multiple actuators, maintaining consistent aggregate data rates even when individual actuators experience variations. The logical block address space is partitioned and assigned to different actuators, enabling parallel data transfer that compensates for individual actuator performance fluctuations.
Solution Approach 2:
The patent introduces a multi-dimensional architecture by adding multiple data surfaces (first data surface and second data surface) that can be accessed simultaneously by different actuators. This dimensional expansion from single-actuator/single-surface to multi-actuator/multi-surface enables the system to maintain consistent data rates through spatial distribution of data operations, where failures or slowdowns in one dimension are compensated by ongoing operations in other dimensions.
2Adaptability or versatility
If multiple video sources are supported, then surveillance system effectiveness is improved, but data rate consistency deteriorates due to workload variations
Solution Approach 1:
The patent creates a universal data storage system where multiple actuators and data surfaces can handle diverse workload types uniformly. The controller dynamically assigns different logical block address ranges to different actuators based on current workload demands, allowing the system to adapt to varying video source requirements while maintaining consistent aggregate data rates. Each actuator-surface pair can independently serve different video streams, providing versatile support for multiple sources.
Solution Approach 2:
The patent dynamically adjusts operational parameters including data surface assignments, actuator workload distribution, and logical block address mappings based on real-time system conditions and video source requirements. This parameter flexibility allows the system to optimize performance for different numbers of video sources while maintaining data rate consistency through adaptive resource allocation and load balancing across the multi-actuator architecture.
3Ease of operation
If data is stored sequentially across logical block address space, then simplicity is maintained, but data rate varies significantly across different address ranges
Solution Approach 1:
The patent introduces a controller as an intermediary layer between the logical block address space and physical data surfaces. This controller implements mapping logic that translates sequential logical block addresses to appropriate physical locations across multiple data surfaces served by different actuators. The mapping mechanism maintains operational simplicity from the host perspective while internally distributing data across multiple actuators to ensure consistent aggregate data rates, effectively mediating between simple sequential access and complex multi-actuator coordination.
Data Source
AI summary
An apparatus includes a logical space and first and second physical spaces. The apparatus further includes a map in which first successive alternate logical elements of the logical space are mapped to successive adjacent physical elements of the first physical space, and second successive alternate logical elements of the logical space are mapped to successive adjacent physical elements of the second physical space. A control circuit employs the map to substantially concurrently manage storage of data extents into the first and second physical space by routing a first subset of the data extents into the first physical space, routing a second subset of the data extents into the second physical space, and splitting individual extents of a third subset of the data extents into sub-portions, with at least one of the sub-portions being routed to the first physical space and another sub-portion being routed to the second physical space.