Dual-ADC Image Sensor Segmentation for Low Power

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Solution Overview

Problem

Conventional CMOS image sensors require increased power consumption to achieve high-frame rates and ultra-high resolutions, which reduces battery life in handheld devices and poses challenges in power-limited applications like space-based or automotive platforms.

Innovation Solution

The implementation of a dual-ADC system that samples analog signals across different dynamic ranges, with one ADC focused on lower intensities with higher resolution and another on higher intensities with lower resolution, along with the separation of ADC components across semiconductor layers to optimize power usage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If the number, frequency, or sampling resolution of ADCs is increased to meet higher data rates and dynamic range requirements, then image quality and frame rate are improved, but power consumption increases

Engineering Contradiction:
Improvedynamic rangeVSAvoidpower consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The patent divides the ADC functionality into multiple separate ADC circuits, each handling a specific portion of the dynamic range. This segmentation allows each ADC to operate at lower resolution and power consumption while collectively covering the full dynamic range required for high-quality imaging.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different ADC circuits are assigned to different dynamic range zones, with each ADC optimized for its specific local range. This local optimization enables lower power consumption in each ADC while maintaining overall high measurement precision across the complete dynamic range through the combination of all ADCs.

Inventive Principle:
Principle #3Local quality

2Productivity

If higher frequency ADCs are used to increase frame rate, then productivity is improved, but power consumption increases

Engineering Contradiction:
Improveframe rateVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The patent segments the high-frame rate conversion task across multiple ADC circuits operating in parallel. Each ADC operates at a lower frequency than a single high-performance ADC would require, reducing individual power consumption while the parallel architecture maintains the overall high frame rate capability.

Inventive Principle:
Principle #1Segmentation

3Productivity

If more ADCs are incorporated to meet higher data rates, then measurement precision is improved, but device complexity increases

Engineering Contradiction:
Improvedata rateVSAvoidADC circuit complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent divides the pixel array into multiple groups, with each group connected to a separate ADC circuit. This segmentation distributes the high data rate conversion load across multiple simpler ADCs rather than requiring a single complex high-speed ADC, thereby improving productivity while managing device complexity.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces power consumption while maintaining or exceeding the dynamic range of conventional sensors, enabling efficient image capture with improved battery life and compatibility in power-limited environments.

Implementation Method 1

each of the pixel cells can include a photodetector that outputs an electric current responsive to light being incident on the photodetector

Methodology Applied
Scientific EffectPhotoelectric effect: Photoelectric Effect

Data Source

PatentUS11284031B1Systems and methods for low-power image digitization
Publication Date: 2022.03.22 OBSIDIAN SENSORS INC
  • US11284031B1 patent drawing
  • US11284031B1 patent drawing
  • US11284031B1 patent drawing

AI summary

A low-power image sensor includes a plurality of light-sensitive pixel cells, a plurality of analog-to-digital converters (ADCs) and image processing circuitry. The image sensor can be disposed in multiple semiconductor layers such that the pixel cells are disposed in a first layer and various other components are disposed in the second layer or between the first layer and the second layer. The image sensor is configured such that the analog output of a pixel cell is sampled by a first ADC and a second ADC within respective first and second dynamic ranges, the second dynamic range being greater than the first dynamic range. The first ADC and the second ADC sample the analog output with different sampling resolutions. The digital outputs of the first ADC and the second ADC are subsequently used by an image processor to generate a pixel value for an image frame.