Dual-Amplifier Capacitive Load Drive for Lower Power Dissipation

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing high voltage capacitive load drive circuits for piezoelectric actuators in inkjet printers suffer from high power dissipation and cost, limiting the resolution and speed of printing due to their reliance on single amplifiers and inefficient energy transfer.

Innovation Solution

A capacitive load drive circuit utilizing two amplifiers, a high current, high voltage gate drive amplifier for ramp up and ramp down, and a floating linear operational amplifier for fine tuning, along with a stepped voltage drive method that cyclically charges and discharges the load through multiple rails, reducing energy dissipation and enhancing control over the drive waveform.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If a single high voltage amplifier is used to drive capacitive loads, then the circuit can deliver fast switching transitions, but power dissipation increases significantly

Engineering Contradiction:
Improveswitching speedVSAvoidpower dissipation
Core Design Contradiction:
SpeedVSLoss of energy

Solution Approach 1:

The patent divides the single amplifier function into two separate amplifiers: a high voltage amplifier for fast switching transitions and a low voltage amplifier for fine linearity control. This segmentation allows each amplifier to operate in its optimal range, reducing overall power dissipation while maintaining fast switching capability and fine control linearity that neither amplifier could achieve alone

Inventive Principle:
Principle #1Segmentation

2Device complexity

If a single amplifier is used for both fast switching and fine linearity control, then device complexity is reduced, but the ability to control waveform parameters precisely is limited

Engineering Contradiction:
Improveamplifier configurationVSAvoidwaveform control precision
Core Design Contradiction:
Device complexityVSMeasurement precision

Solution Approach 1:

The patent applies local quality by assigning different functional characteristics to different amplifiers: the high voltage amplifier provides fast switching capability for the edges of the waveform, while the low voltage amplifier provides fine linearity control for the flat-top portion. This localized functional assignment enables precise control of different waveform segments with appropriate amplifier characteristics for each segment

Inventive Principle:
Principle #3Local quality

3Quantity of substance

If higher load capacitance is driven, then more piezoelectric elements can be actuated, but the frequency of the drive waveform must be reduced

Engineering Contradiction:
Improvenumber of actuatorsVSAvoidwaveform frequency
Core Design Contradiction:
Quantity of substanceVSSpeed

Solution Approach 1:

The patent changes the voltage parameter strategy by using a two-amplifier configuration that enables faster charging and discharging of the load capacitor. The high voltage amplifier can rapidly change the voltage state of the capacitor, allowing higher operating frequencies even with large capacitance values, thus breaking the traditional inverse relationship between load capacitance and operating frequency

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS8717071B2High voltage linear amplifier driving heavy capacitive loads with reduced power dissipation
Publication Date: 2014.05.06 CIRRUS LOGIC INC
  • US8717071B2 patent drawing
  • US8717071B2 patent drawing
  • US8717071B2 patent drawing

AI summary

A capacitive load drive circuit may comprise a high current drive amplifier configured to be coupled to a capacitive load during a high current ramp up of the voltage across the capacitive load to a cut off voltage; a low current drive amplifier configured to be connected to the capacitive load during a low current ramp up of the voltage across the capacitive load, from the cut off voltage to a maximum voltage across the capacitive load; and the high current drive amplifier configured to be connected to the capacitive load during a high current ramp down of the voltage across the capacitive load. The low current drive amplifier may be connected to the capacitive load during a period of steady state of the voltage across the capacitive load, intermediate the low current ramp up and the high current ramp down.