Dual Power Amplifier Layout for Faster Output Power Rise
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Solution Overview
Problem
Conventional power amplifiers for CDMA applications experience significant delays in output power rise when switching between main and subsidiary power amplifiers due to heat dissipation and mutual heat interference, leading to inefficiencies and increased idle current.
Innovation Solution
The power amplifier design involves closely placing the latter amplification elements of the main and subsidiary power amplifiers, with specific intervals between them to minimize heat interference, and optimizing the layout to reduce thermal resistance, allowing for quicker heat dissipation and improved output power rise times.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If the main power amplifier and subsidiary power amplifier are switched to improve efficiency and reduce idle current, then power amplifier efficiency is improved, but the output power rise time is delayed
Solution Approach 1:
The patent applies preliminary action by pre-heating the subsidiary power amplifier's amplification elements before switching occurs. The main power amplifier's heat is utilized to pre-heat the subsidiary power amplifier's latter amplification element in advance, so that when switching occurs, the subsidiary amplifier is already at an elevated temperature and can respond faster, reducing the output power rise time delay
Solution Approach 2:
The patent converts the harmful effect of heat interference into a beneficial pre-heating mechanism. The heat generated by the main power amplifier's latter amplification element, which would normally be wasted or cause interference, is redirected to pre-heat the subsidiary power amplifier's amplification element, transforming it into a useful function that improves switching response time
2Temperature
If the latter amplification elements are placed close together to reduce thermal resistance, then heat dissipation is improved, but mutual heat interference increases
Solution Approach 1:
The patent applies local quality by creating different spatial zones with different thermal characteristics. The latter amplification elements are placed close together (within 100 μm) to enable beneficial heat transfer, while the latter bias circuit is placed at a different location (at least 200 μm from the main power amplifier's latter amplification element) to avoid harmful heat interference, allowing each component to experience the appropriate thermal environment for its function
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration significantly reduces the delay in output power rise when switching between main and subsidiary power amplifiers, enhancing efficiency and reducing idle current, thereby improving power amplifier performance.
Implementation Method 1
The interval between the latter amplification element of the main power amplifier and the latter amplification element of the subsidiary power amplifier is not more than 100 μm, allowing heat transfer through the substrate via thermal conduction
Implementation Method 2
heat dissipation and mutual heat interference, leading to inefficiencies
Data Source
AI summary
A power amplifier according to the present invention is operated by switching a main power amplifier and a subsidiary power amplifier. The idle current of the subsidiary power amplifier is smaller than the idle current of the main power amplifier. Each of the main power amplifier and the subsidiary power amplifier has a former amplification element for amplifying RF signals, a latter amplification element for amplifying output signals from the former amplification element, a former bias circuit for driving the former amplification elements, and a latter bias circuit for driving the latter amplification elements, respectively. The interval between the latter amplification element of the main power amplifier and the latter amplification element of the subsidiary power amplifier is not more than 100 μm. The interval between the latter amplification element of the main power amplifier and the latter bias circuit of the subsidiary power amplifier is not less than 200 μm.