Dual Anti-Fuse Memory Cell Differential Read Circuit
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Solution Overview
Problem
In memory systems, the variation in threshold voltages of transistors during manufacturing makes it difficult to choose a proper reference voltage for data reading, leading to increased data reading time and potential false readings.
Innovation Solution
A memory cell design incorporating two anti-fuse elements and a selection circuit, where the first anti-fuse element and second anti-fuse element are programmed with different voltages to generate a voltage difference during read operations, allowing for accurate data identification without reference voltages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a reference voltage is used to identify data in memory cells, then the data reading process can be performed, but the variation in transistor threshold voltages during manufacturing makes it difficult to choose a proper reference voltage, leading to increased data reading time and potential false readings
Solution Approach 1:
The patent creates a complementary copy of the memory cell structure with two anti-fuse elements that are mirror images in their programming states. One anti-fuse element is programmed to a high resistance state while the other is programmed to a low resistance state, creating a differential signal that eliminates the need for external reference voltages and compensates for transistor threshold variations.
Solution Approach 2:
The patent changes the resistance parameter of the anti-fuse elements by programming them to different resistance states (high resistance vs. low resistance). This parameter change creates a measurable voltage difference during read operations that is independent of transistor threshold voltage variations, thereby improving reading accuracy and speed.
2Ease of manufacture
If transistors with varying threshold voltages are used in memory cells, then manufacturing can proceed with standard processes, but it becomes difficult to choose a proper reference voltage for identifying data
Solution Approach 1:
The patent creates a complementary copy of the memory cell structure with two anti-fuse elements that are mirror images in their programming states. One anti-fuse element is programmed to a high resistance state while the other is programmed to a low resistance state, creating a differential signal that eliminates the need for external reference voltages and compensates for transistor threshold variations.
Solution Approach 2:
The patent changes the resistance parameter of the anti-fuse elements by programming them to different resistance states (high resistance vs. low resistance). This parameter change creates a measurable voltage difference during read operations that is independent of transistor threshold voltage variations, thereby improving reading accuracy and speed.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design improves reading accuracy and reduces data reading time by enabling differential voltage comparison, eliminating the need for reference voltages and currents.
Implementation Method 1
a first anti-fuse element and a second anti-fuse element, wherein the first anti-fuse element has a first terminal, a second terminal being floating, and a control terminal coupled to a first anti-fuse control line
Data Source
AI summary
A memory cell includes a first anti-fuse element, a second anti-fuse element, and a selection circuit. The first anti-fuse element has a first terminal, a second terminal being floating, and a control terminal coupled to a first anti-fuse control line. The second anti-fuse element has a first terminal coupled to the first terminal of the first anti-fuse element, a second terminal being floating, and a control terminal coupled to a second anti-fuse control line. The selection circuit is coupled to the first terminal of the first anti-fuse element, the first terminal of the second anti-fuse element, and a source line. The selection circuit controls an electrical connection from the source line to the first terminal of the first anti-fuse element and the first terminal of the second anti-fuse element.