Dual Hydrogen Barrier Structure for Dense Ferroelectric Memory Arrays
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Solution Overview
Problem
Integration of capacitor devices with ferroelectric or paraelectric materials on the same plane as interconnects is challenging due to hydrogen damage, which affects the formation of barrier layers and the scalability of high-density capacitor arrays.
Innovation Solution
A dual hydrogen barrier system is implemented, comprising a conductive hydrogen barrier integrated into the contact electrode and an insulative hydrogen barrier adjacent to the memory device, along with a high-density dielectric layer to prevent hydrogen diffusion, allowing for the integration of ferroelectric and paraelectric materials in high-density arrays.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If barrier layers are formed around capacitor devices, then hydrogen damage is prevented, but manufacturing complexity increases due to the need for precise spacing and multiple barrier formation steps
Solution Approach 1:
The barrier structure is divided into two distinct segments: a first barrier layer (conductive) and a second barrier layer (insulative). Each layer serves a specific function and can be formed using different materials and processes optimized for its role, simplifying the overall formation process while maintaining effective hydrogen protection.
Solution Approach 2:
Different regions of the barrier structure have different properties: the first barrier layer is conductive to prevent hydrogen diffusion while maintaining electrical connectivity, while the second barrier layer is insulative to provide additional hydrogen blocking. This local differentiation allows each layer to be optimized for its specific function.
2Quantity of substance
If spacing between devices is reduced for high-density integration, then device density increases, but barrier layer formation becomes more challenging
Solution Approach 1:
The barrier structure extends in multiple dimensions with the first barrier layer forming a lateral barrier around the capacitor device and the second barrier layer providing vertical protection. This multi-dimensional approach allows effective barrier formation even when lateral spacing between devices is reduced for high-density integration.
3Adaptability or versatility
If capacitor devices with ferroelectric or paraelectric materials are integrated on the same plane as interconnects, then device integration is achieved, but hydrogen damage occurs to the capacitor materials
Solution Approach 1:
The dual barrier structure acts as an intermediary between the capacitor device and the surrounding environment (including interconnects). The first conductive barrier layer and second insulative barrier layer together form a protective interface that allows integration with interconnects while blocking hydrogen from reaching the sensitive ferroelectric or paraelectric materials.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The dual hydrogen barrier effectively protects capacitor devices from hydrogen damage, enabling the integration of high-density capacitor arrays with improved reliability and scalability.
Implementation Method 1
A dual hydrogen barrier system is implemented, comprising a conductive hydrogen barrier integrated into the contact electrode and an insulative hydrogen barrier adjacent to the memory device, along with a high-density dielectric layer to prevent hydrogen diffusion
Data Source
AI summary
A device includes, in a first region, a first conductive interconnect, an electrode structure on the first conductive interconnect, where the electrode structure includes a first conductive hydrogen barrier layer and a first conductive fill material. A memory device including a ferroelectric material or a paraelectric material is on the electrode structure. A second dielectric includes an amorphous, greater than 90% film density hydrogen barrier material laterally surrounds the memory device. A via electrode including a second conductive hydrogen barrier material is on at least a portion of the memory device. A second region includes a conductive interconnect structure embedded within a less than 90% film density material.