Dual Beta Ratio SRAM Cell Design for Stability and Write Speed

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Solution Overview

Problem

In static random access memory (SRAM) design, ensuring that half-selected cells do not switch states during half-selection is challenging due to incomplete pre-charge or design imbalance, leading to data instability and increased read/write times.

Innovation Solution

A dual beta ratio SRAM cell is implemented with a higher beta ratio for the read port and a lower beta ratio for the write port, allowing for stable data reading without disturbing half-selected cells and enabling fast write operations by adjusting passgate size, material, oxide thickness, or channel doping.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the beta ratio is increased to improve cell stability and prevent half-selected cell switching, then the static noise margin increases, but the write time increases and write performance deteriorates

Engineering Contradiction:
Improvecell stabilityVSAvoidwrite time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies dynamics by making the beta ratio adjustable rather than fixed. The write port uses a lower beta ratio (faster switching) while the read port uses a higher beta ratio (more stable), allowing the cell to dynamically adapt its characteristics based on the operation being performed. This is achieved through separate passgate sizing for read and write ports, enabling optimal performance for each operation type without compromise.

Inventive Principle:
Principle #15Dynamics

2Speed

If the passgate resistance is reduced to improve read performance and minimize read time, then the beta ratio decreases and cell stability deteriorates, increasing the risk of half-selected cell switching

Engineering Contradiction:
Improveread timeVSAvoidcell stability
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent applies local quality by differentiating the passgate characteristics for read and write operations. The read passgates are sized to provide low resistance for fast reading, while the write passgates are sized differently to maintain appropriate beta ratio for stable writing. This localized optimization allows each port to have the ideal characteristics for its specific function without compromising the other.

Inventive Principle:
Principle #3Local quality

3Reliability

If the beta ratio is increased to prevent half-selected cell disturbance, then the cell becomes more stable, but the cell is harder to switch during write operations and productivity decreases

Engineering Contradiction:
Improvehalf-select immunityVSAvoidwrite speed
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent applies segmentation by dividing the single beta ratio parameter into separate beta ratios for read and write ports. The write port beta ratio is optimized independently from the read port beta ratio, allowing the write operation to use a lower beta ratio for faster switching while the read operation uses a higher beta ratio for better stability and half-select immunity. This segmentation resolves the contradiction by allowing different optimization goals for different operations.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS8339893B2Dual beta ratio SRAM
Publication Date: 2012.12.25 GLOBALFOUNDRIES US INC
  • US8339893B2 patent drawing
  • US8339893B2 patent drawing
  • US8339893B2 patent drawing

AI summary

A static random access memory (SRAM) cell includes a first read port, the first read port having a first beta ratio; and a write port, the write port having a second beta ratio that is substantially lower than the first beta ratio. A static random access memory (SRAM) array includes a plurality of SRAM cells, an SRAM cell including a first read port, the first read port having a first beta ratio; and a write port, the write port having a second beta ratio that is substantially lower than the first beta ratio.