Dual Bias Amplifier Circuit for Low-Noise Gain Compression
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Solution Overview
Problem
High-efficiency, linear power amplifiers for GSM systems face challenges in reducing noise and small-signal gain, leading to undesirable signal-to-noise ratios due to non-linear operation classes and existing bias control solutions, which result in inefficiencies and instability.
Innovation Solution
A dual bias control circuit that limits the supply voltage of amplifier stages based on a control signal derived from the biasing current, using a voltage-to-current converter and current mirror to achieve both current and voltage steering, reducing small-signal gain and noise while maintaining stability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If power transistors are biased in non-linear classes (Class C and Class AB) to achieve high efficiency, then power efficiency is improved, but small-signal gain increases leading to high output noise
Solution Approach 1:
The bias control is segmented into two independent controls: one for the first amplifier stage and another for the second stage. This allows the first stage to operate in non-linear Class C for efficiency while the second stage operates in linear Class A to suppress noise and small-signal gain, resolving the contradiction between efficiency and noise performance
Solution Approach 2:
Different biasing conditions are applied to different stages of the amplifier. The first stage uses non-linear biasing (Class C) optimized for efficiency, while the second stage uses linear biasing (Class A) optimized for low noise and low small-signal gain, allowing each stage to have locally optimized characteristics
2Object-generated harmful factors
If a parallel switching element is used to damp SSG peaking, then small-signal gain is reduced, but the switching element requires precise timing control and does not fully eliminate noise
Solution Approach 1:
A current mirror circuit is introduced as an intermediary mechanism to couple the bias control of the first stage to the second stage. The current mirror automatically replicates the bias current, ensuring that when the first stage bias is adjusted to damp SSG, the second stage bias is correspondingly adjusted to maintain low noise performance without requiring complex timing control
3Object-generated harmful factors
If separate bias control is used for first and second amplifier stages, then noise performance is improved, but circuit complexity increases
Solution Approach 1:
The bias control circuits of the first and second amplifier stages are merged through a current mirror connection. This allows independent bias control for noise optimization while using a shared current reference and mirror structure, reducing overall circuit complexity compared to fully independent control circuits
Data Source
AI summary
The present invention relates to a bias control circuit and method for supplying a bias signal to at least one stage of an amplifier circuit, wherein a dual bias control is provided by generating a bias current and additionally using this bias current to derive a control signal for limiting a supply voltage of the at least one amplifier stage in response to the control signal. Thereby, a compression of the output signal of the amplifier stage, which results from the voltage limitation, can be realized in addition to the base current steering. This leads to a decrease in small signal gain and thus reduced output noise.