Dual-Bit Memory Cell Reading Method for Sensing Window Expansion
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Solution Overview
Problem
The existing dual-bit nitride trapping layer memory cells face a limited sensing window due to the second-bit effect, which affects the output current value and restricts the range of the predetermined reference value, making it difficult to accurately determine the bit states.
Innovation Solution
A method is introduced where two output current values are measured in different reading directions to simultaneously determine the bit states of the first and second bit storage nodes, effectively increasing the sensing window by comparing these values.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If a single read direction is used to determine bit states, then the reading process is simple, but the sensing window is limited and bit state determination accuracy is reduced
Solution Approach 1:
The patent applies dimensionality change by introducing a second read direction (reverse read) to complement the first read direction. Instead of relying on a single measurement dimension, the method performs readings in both forward and reverse directions, effectively adding another dimension to the measurement space. This allows for more accurate bit state determination by comparing results from multiple directional measurements, thereby resolving the contradiction between operational simplicity and measurement precision.
2Measurement precision
If the sensing window is increased by using multiple read directions, then bit state determination accuracy is improved, but the reading operation complexity increases
Solution Approach 1:
The patent applies segmentation by dividing the reading operation into distinct segments: a first read in one direction and a second read in the reverse direction. Each segment serves a specific purpose in determining bit states, and the results are processed separately before being combined for final determination. This segmentation approach manages complexity by breaking down the multi-directional reading process into manageable, systematic steps, thereby resolving the contradiction between improved measurement precision and increased operational complexity.
Data Source
AI summary
A method of reading a dual-bit memory cell includes a controlling terminal, a first terminal, and a second terminal. The dual-bit memory cell has a first bit storage node and a second bit storage node near the first terminal and the second terminal respectively. First, a controlling voltage and a read voltage are applied to the controlling terminal and the first terminal respectively. The second terminal is grounded to measure a first output current value of the first terminal. Then, the controlling voltage and the read voltage are applied to the controlling terminal and the second terminal respectively. The first terminal is grounded to measure a second output current value of the second terminal. Afterward, the bit state of the first bit storage node and the bit state of the second bit storage node is read simultaneously according to the first output current value and the second output current value.


