Dual-Folded Bootstrap Buck-Boost Converter for High-Frequency Charging

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Solution Overview

Problem

External MOSFET-based charger designs suffer from lower efficiency and higher thermal losses, which consume thermal budget that could be used for performance gain on System-on-Chip (SoC) during AC-power mode, and require reduced frequency operation, leading to larger size and increased real estate.

Innovation Solution

A buck-boost converter design using DrMOS or DrGaN devices with dual-folded bootstrap capacitors, which allows for higher frequency operation, reduced parasitic losses, and optimized packaging, enabling smaller inductor size and lower real estate requirements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If external MOSFET-based charger designs are used, then the device can be implemented with conventional components, but the efficiency is lower and thermal losses are higher

Engineering Contradiction:
Improvethermal lossesVSAvoidcharger design complexity
Core Design Contradiction:
Loss of energyVSDevice complexity

Solution Approach 1:

The patent integrates the driver and MOSFET into a single DrMOS device package, merging previously separate components. This integration reduces parasitic inductance and resistance, leading to lower conduction losses and improved efficiency while maintaining ease of implementation through a unified component structure

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The driver circuit is nested within the DrMOS device package, with the driver internally coupled to the MOSFET. This nested configuration allows the driver to be physically close to the power switch, minimizing trace inductance and improving overall device efficiency by reducing energy losses in the connection paths

Inventive Principle:
Principle #7Nested doll (Nesting)

2Speed

If external MOSFET-based charger designs are used, then the implementation is straightforward with conventional components, but the frequency of operation must be reduced to keep efficiency high

Engineering Contradiction:
Improvefrequency of operationVSAvoidefficiency
Core Design Contradiction:
SpeedVSLoss of energy

Solution Approach 1:

By merging the driver and MOSFET into a single integrated DrMOS device, the patent eliminates the parasitic inductance of external connections. This allows the device to operate at higher switching frequencies without the efficiency penalties that would normally accompany increased frequency in conventional designs

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent replaces the mechanical/physical separation of driver and MOSFET components with an integrated electronic solution. The internal coupling within the DrMOS device substitutes for external PCB traces and connectors, enabling higher frequency operation by eliminating the physical limitations of discrete component layouts

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Area of stationary object

If the frequency of operation is reduced to keep efficiency high, then thermal losses are managed, but the real-estate and z-height increase

Engineering Contradiction:
Improvereal-estateVSAvoidefficiency
Core Design Contradiction:
Area of stationary objectVSLoss of energy

Solution Approach 1:

The integration of driver and MOSFET into a single DrMOS device dramatically reduces the footprint required on the PCB. The merged component eliminates the need for separate driver ICs, MOSFET packages, and extensive interconnecting traces, thereby reducing both planar real-estate and z-height while allowing higher frequency operation that further shrinks passive component sizes

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent transitions from a distributed three-component layout (driver, MOSFET, inductor) to a compact integrated structure. By consolidating the driver and MOSFET into one device package, the solution reduces the spatial dimensions required, allowing for smaller overall charger design with reduced z-height and improved thermal management

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

4Loss of energy

If DrMOS devices with dual-folded bootstrap are used, then efficiency is higher and thermal losses are lower, but the device structure becomes more complex

Engineering Contradiction:
Improvethermal lossesVSAvoiddevice structure
Core Design Contradiction:
Loss of energyVSDevice complexity

Solution Approach 1:

The dual-folded bootstrap capacitor configuration segments the charging paths for the high-side MOSFET gate. By creating separate folded paths that connect to different inductor nodes, the design ensures proper gate drive voltage generation during both buck and boost operations, improving efficiency through optimized switching while managing the structural complexity through systematic segmentation of the bootstrap network

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The design achieves higher efficiency, lower thermal losses, and reduced size, allowing for improved SoC performance within the same thermal budget, enabling thinner and lighter systems with fast-charging capabilities and flexibility using USB Type-C compliant power supply.

Implementation Method 1

dual-folded bootstrap capacitors coupled to the inductor, the first driver and the second driver

Methodology Applied
Scientific EffectCapacitance: Capacitance

Implementation Method 2

an inductor coupled to the first module and the second module

Methodology Applied
Scientific EffectElectromagnetic induction: Electromagnetic Induction

Implementation Method 3

reduced parasitic losses, and optimized packaging

Methodology Applied
Scientific EffectParasitic capacitance reduction: Parasitic Capacitance

Data Source

PatentUS12051976B2Dual-folded boot-strap based buck-boost converter
Publication Date: 2024.07.30 INTEL CORP
  • US12051976B2 patent drawing
  • US12051976B2 patent drawing
  • US12051976B2 patent drawing

AI summary

A buck-boost converter having dual-folded bootstrap for driver metal oxide semiconductor (DrMOS) device that, in addition to the traditional bootstrap capacitors, include folded bootstrap capacitors that cross-couple inductor nodes to the two sets of DrMOS switches. The DrMOS switches can be n-type or p-type, and can be replaced with driver Gallium Nitride (DrGaN) devices.