Dual Buffer Memory Controller for SSD Soft Error Mitigation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
As storage devices like solid state drives (SSDs) experience increased input/output speeds and storage capacities, the internal memory's soft error rate rises, leading to reliability deterioration due to bit flips, which existing technologies fail to effectively mitigate.
Innovation Solution
A storage device with a controller that dynamically determines a buffer memory based on error bit numbers or generation frequency, redirecting data between a primary and secondary buffer memory to maintain data accuracy and reliability, and dynamically controls rewrite cycles in read-only regions to manage error bits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the internal memory capacity and functions are increased to handle higher input/output speeds and storage capacity, then the performance of the storage device is improved, but the soft error rate increases leading to reliability deterioration
Solution Approach 1:
A second buffer memory is introduced as an intermediary to receive and buffer data when error bits in the first buffer memory exceed the threshold. This mediator component isolates the harmful effect of soft errors from the data path, allowing the system to maintain high performance while improving reliability by redirecting data through a cleaner buffer when needed.
Solution Approach 2:
The system dynamically changes the operational parameters by monitoring error bit counts and generation frequencies in real-time. When error parameters exceed thresholds, the system switches the data buffering operation from the first buffer memory to the second buffer memory, effectively adapting the system behavior based on observed error conditions to maintain reliability without sacrificing performance.
2Device complexity
If a single buffer memory is used to buffer write and read data, then the device complexity is reduced, but the reliability deteriorates due to error bits affecting all operations
Solution Approach 1:
The buffer memory functionality is segmented into two separate buffer memories: a first buffer memory for normal operation and a second buffer memory for error mitigation. This segmentation allows the system to isolate error-prone operations from critical data paths, improving reliability while maintaining manageable complexity through clear functional separation and controlled switching logic.
3Productivity
If the threshold for error bit tolerance is increased to maintain performance, then the productivity is maintained, but the reliability deteriorates due to accumulation of error bits
Solution Approach 1:
The system implements continuous feedback monitoring of error bit counts and generation frequencies in the first buffer memory. This feedback mechanism dynamically determines when to switch to the second buffer memory, allowing the system to maintain high productivity during normal operation while automatically responding to error conditions to preserve reliability. The feedback loop ensures that performance is optimized without compromising data integrity.
Data Source
AI summary
An integrated circuit device includes a nonvolatile memory, first and second buffer memories, and a controller. Each of the first and second buffer memories is configured to buffer write data to be written to the nonvolatile memory in response to a write request and also buffer read data received from the nonvolatile memory in response to a read request. A controller is provided, which evaluates the first buffer memory against at least one criterion relating to data accuracy. The controller is configured to: redirect at least some of the write data from the first buffer memory to the second buffer memory in response to the write request when the evaluation demonstrates the criterion has been exceeded, and redirect at least some of the read data from the first buffer memory to the second buffer memory in response to the read request when the evaluation demonstrates the criterion has been exceeded.