Dual-Buffer Input Receiver for Wide I/O Voltage Without Crowbar
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing input buffers for analog devices like Ethernet PHY and USB suffer from voltage clipping-induced crowbar conditions, leading to duty cycle distortion, especially when operating at higher frequencies with low slew rates, and are limited to known I/O supply levels or low frequencies due to their implementation with thin-oxide MOSFETs.
Innovation Solution
A receiver design featuring low-side and high-side buffers with voltage subtractors and output stages, utilizing specific transistor configurations and inverter stages to prevent short circuit conduction paths and operate across a wide range of I/O voltage levels (1.8V-3.3V), ensuring reliable signal reception without requiring I/O supply level information.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If input buffers are implemented with thin-oxide MOSFETs with low voltage gates, then the device can operate at lower voltages, but the device cannot tolerate higher I/O voltage levels (limited to 1.8V)
Solution Approach 1:
The input buffer is divided into two separate buffers: a low-side buffer implemented with thin-oxide MOSFETs that operates at low voltages (1.8V), and a high-side buffer implemented with thick-oxide MOSFETs that operates at high voltages (3.3V). Each buffer handles a specific voltage range, allowing the system to support both low and high I/O voltage levels simultaneously without compromising device integrity.
2Productivity
If existing input buffers operate at higher frequencies with low slew rates, then productivity increases, but voltage clipping-induced crowbar condition occurs causing duty cycle distortion
Solution Approach 1:
Different oxide thicknesses are applied to different parts of the buffer system: thin-oxide MOSFETs in the low-side buffer for low-voltage operation and thick-oxide MOSFETs in the high-side buffer for high-voltage operation. This localized differentiation allows each buffer to be optimized for its specific voltage range, preventing voltage clipping and crowbar conditions while maintaining high-frequency operation.
3Reliability
If input buffers require I/O supply level information to reliably receive input voltages, then voltage reception reliability improves, but device complexity increases
Solution Approach 1:
The dual-buffer architecture provides universal voltage reception capability, where the low-side buffer handles low-voltage inputs (1.8V) and the high-side buffer handles high-voltage inputs (3.3V). The system automatically routes signals to the appropriate buffer based on voltage level, eliminating the need for external supply level detection circuits while maintaining reliable voltage reception across different I/O standards.
Data Source
AI summary
A receiver includes a low-side buffer having an input terminal coupled to receive an input signal and having an output terminal coupled to a buffer terminal. Responsive to the input signal being LOW, the low-side buffer is configured to couple the buffer terminal to ground. The receiver also includes a high-side buffer having an input terminal coupled to receive the input signal and having an output terminal coupled to the buffer terminal. Responsive to the input signal being HIGH, the high-side buffer is configured to provide an I/O voltage at the buffer terminal. The receiver also includes an output stage coupled to the buffer terminal and having a low voltage terminal configured to receive a low supply voltage. The output stage is configured to provide an output signal responsive to the I/O voltage at the buffer terminal, wherein the output signal is lower than the I/O voltage.