Dual-Bus Embedded OS Control for Lower-Cost Hardware Management

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Solution Overview

Problem

Current devices using hardware logic devices like CPLD and EC chips increase system costs and reduce the running efficiency of operating systems due to increased interaction between devices.

Innovation Solution

Implementing a chip with a processor, a hardware controller, and two buses with different bandwidth configurations to allow two operating systems to communicate and control hardware resources efficiently, thereby reducing the need for additional hardware devices.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If hardware logic devices such as CPLD, EC chip and control chip are used to achieve device control, then device control capability is improved, but system cost increases and operating system running efficiency decreases

Engineering Contradiction:
Improvedevice control capabilityVSAvoidoperating system running efficiency
Core Design Contradiction:
Ease of operationVSProductivity

Solution Approach 1:

The patent merges the functions of multiple hardware logic devices (CPLD, EC chip, control chip) into a single integrated hardware controller. This consolidation reduces the number of separate components interacting with the operating system, thereby decreasing system complexity and improving operating efficiency while maintaining comprehensive device control capabilities through the unified controller.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The hardware controller is designed as a universal component that can control multiple types of devices (storage devices, network devices, display devices, input devices) through different communication interfaces. This multi-functional approach replaces the need for multiple specialized hardware logic devices, reducing system complexity while maintaining broad device control capability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Ease of operation

If multiple hardware logic devices are used to achieve device control, then device control capability is improved, but the number of interactions between devices increases

Engineering Contradiction:
Improvedevice control capabilityVSAvoidnumber of interactions between devices
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

The patent consolidates multiple hardware logic devices into a single integrated hardware controller that manages all device interactions centrally. This reduces the number of inter-device communication pathways from multiple separate device interactions to a single controller coordinating with the operating system, thereby simplifying the overall system architecture.

Inventive Principle:
Principle #5Merging (Combining)

3Ease of operation

If additional hardware logic devices are added to enhance control functionality, then device control capability is improved, but system cost increases

Engineering Contradiction:
Improvedevice control capabilityVSAvoidsystem cost
Core Design Contradiction:
Ease of operationVSEase of manufacture

Solution Approach 1:

The patent integrates the control functions of multiple separate hardware logic devices into a single hardware controller, reducing the total component count and thereby lowering manufacturing costs. This consolidation maintains comprehensive device control capability while eliminating the need to produce and assemble multiple separate hardware components.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The hardware controller is designed as a universal component that can control multiple types of devices (storage, network, display, input devices) through different communication interfaces. This multi-functional design replaces the need for multiple specialized hardware devices, reducing component diversity and manufacturing complexity while maintaining broad control capabilities.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS20260099363A1Method and apparatus for controlling running of operating system, and embedded system and chip
Publication Date: 2026.04.09 INSPUR SUZHOU INTELLIGENT TECH CO LTD
  • US20260099363A1 patent drawing
  • US20260099363A1 patent drawing
  • US20260099363A1 patent drawing

AI summary

Provided are a method and apparatus for controlling running of an operating system, and an embedded system and a chip. The embedded system includes a chip and at least two operating systems. The chip includes a processor, a hardware controller, a first bus, and a second bus. The bandwidth of the first bus is higher than the bandwidth of the second bus; the first bus is configured as a multi-master and multi-slave mode; and the second bus is configured as a one-master and multi-slave mode. The at least two operating systems are configured to run on the basis of the processor; the at least two operating systems are configured to communicate with each other by the first bus; and the at least two operating systems are configured to control the hardware controller by the second bus.