Dual Cache Row Hammer Mitigation via Proactive Refresh
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Solution Overview
Problem
Row Hammer attacks in DRAM memory devices cause reliability and security vulnerabilities due to repeated activation of memory rows, leading to data corruption and potential system takeover, as adjacent rows are flipped to incorrect values, exploited by malicious software.
Innovation Solution
A dual cache system with a direct mapped cache and a victim cache performs row access tracking, using counters to set a lower refresh rate for adjacent rows, mitigating Row Hammer attacks without significant performance or power overhead, and employing error correction to ensure data integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If DRAM rows are opened and closed repeatedly within a refresh interval, then memory access speed is improved, but adjacent rows are flipped to wrong values causing data corruption
Solution Approach 1:
The patent applies preliminary action by proactively refreshing victim rows before they can be corrupted by row hammer attacks. The system monitors activation counts of target rows and preemptively refreshes adjacent victim rows when the activation count approaches a threshold, preventing data corruption before it occurs while allowing normal high-speed access to continue
2Reliability
If traditional refresh mechanisms are used, then data integrity is maintained, but performance overhead increases due to frequent refresh operations
Solution Approach 1:
The patent applies local quality by selectively refreshing only victim rows that are at risk of corruption, rather than performing blanket refresh operations on all memory rows. The system identifies specific victim rows adjacent to heavily accessed target rows and refreshes only those localized regions, maintaining data integrity while minimizing performance impact
Solution Approach 2:
The patent applies parameter changes by dynamically adjusting refresh rates based on activation patterns. The system monitors row activation counts and adjusts the refresh timing of victim rows accordingly, refreshing them more frequently when target rows are heavily accessed and less frequently when access patterns are normal, thereby optimizing the balance between reliability and productivity
3Reliability
If row hammer attacks are prevented by frequent refreshing, then security is improved, but power consumption increases
Solution Approach 1:
The patent applies local quality by limiting refresh operations to only those victim rows that are vulnerable to row hammer attacks from actively accessed target rows. Instead of uniformly refreshing all memory rows, the system identifies and refreshes only the specific local regions at risk, thereby enhancing security against row hammer attacks while minimizing unnecessary power consumption from redundant refresh operations
Data Source
AI summary
Systems, apparatuses, and methods related to a memory controller for performing row access tracking to mitigate row hammer attacks. A memory controller comprises a dual cache system including a direct mapped cache and a victim cache. The direct mapped cache functions as the main cache while a fully associative victim cache is used to reduce hammer attacks to targeted rows. The direct mapped cache performs an aliasing operation to map at least a portion of data stored in a memory device to the direct mapped cache. The direct mapped cache also uses a plurality of counters operatively coupled to the direct mapped cache to track and monitor the number of activations of the data stored in the direct mapped cache. The memory controller proactively refreshes all adjacent rows in the memory device when the respective counter of the direct mapped cache exceeds a predetermined threshold.