Dual Cache L2P Mapping for Random Writes in ZNS Memory
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Solution Overview
Problem
Conventional zone namespace (ZNS) memory devices lack efficient support for random writes, as they primarily allow sequential writing, leading to issues with overwriting data and inefficient management of noncontiguous logical block addresses.
Innovation Solution
Implementing a dual cache architecture with a ZRWA-specific logical-to-physical (L2P) mapping table to isolate random writes from sequential writes, using a secondary cache to track and manage noncontiguous logical block addresses (LBAs) at a more granular level, and maintaining a record of the most recent LBA versions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conventional ZNS memory devices use sequential writing only, then device complexity is reduced, but random write support is inefficient
Solution Approach 1:
The patent segments the cache into two distinct parts: a first cache for sequential writes and a second cache for random writes. This segmentation allows the system to handle different write patterns separately, enabling random write support without compromising the simplicity of sequential write operations. The second cache specifically manages noncontiguous LBA ranges, providing the needed adaptability while isolating complexity to only where it is required.
2Reliability
If a single cache is used for both sequential and random writes, then device complexity is reduced, but data integrity is compromised due to overwriting issues
Solution Approach 1:
By dividing the cache into separate first and second caches for sequential and random writes respectively, the patent prevents data overwriting issues that would occur in a single cache. The second cache is specifically designed to track noncontiguous LBA ranges and maintain version information, ensuring data integrity for random writes without affecting the simplicity and reliability of sequential write operations in the first cache.
Solution Approach 2:
The patent introduces an intermediary mechanism in the form of version information tracking within the second cache. This intermediary layer monitors and manages the state of noncontiguous LBA ranges, preventing overwriting of valid data while allowing the underlying cache structure to remain relatively simple. The version tracking acts as a mediator between the random write operations and the physical storage, ensuring data integrity.
3Productivity
If granular tracking of noncontiguous LBAs is implemented, then random write management is improved, but device complexity increases
Solution Approach 1:
The patent applies local quality by implementing granular tracking of noncontiguous LBA ranges specifically in the second cache where it is needed for random write management, while the first cache maintains a simpler structure for sequential writes. This localized approach improves random write management efficiency without unnecessarily increasing the complexity of the entire cache system. The granular tracking is confined to the specific region (second cache) where it provides value.
Data Source
AI summary
A method includes allocating random write resources to a first portion of a zone having a range of LBAs and a cache storing data of the first portion of the zone. A write command is received including an LBA. The LBA is mapped to a PBA of the cache using a first L2P table. Each of one or more LBAs in the range of LBAs of the first portion of the zone is mapped to a corresponding PBA of the cache using entries of the first L2P table. A range of sequential LBAs of a second portion of the zone is mapped to a physical block of the zone. Each LBA of the range of sequential LBAs is accessed using an offset corresponding to a position of each LBA in the range of sequential LBAs of the second portion of the zone. The write command is executed at the PBA.