Dual-Capacitor Ramp Generator for Linear High-Speed Voltage Ramps
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Solution Overview
Problem
High-speed ramp generators suffer from limited slew time, leading to nonlinearity and harmonic distortion in voltage ramp signals, which limits the speed of switching regulators and introduces ringing, overshoot, and undershoot.
Innovation Solution
An improved ramp generator design using two preliminary voltage ramp signals generated by alternatingly charging capacitors, allowing for slow reset times and multiplexing between them to produce an output voltage ramp signal with high linearity, reducing noise and nonlinearity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If fast discharge is used to reset the capacitor quickly, then the ramp speed is improved, but linearity deteriorates due to ringing, overshoot, and undershoot
Solution Approach 1:
The patent divides the single ramp generation task into two separate preliminary ramp signals generated by different capacitors. These segmented ramp signals are then combined through multiplexing to create the final output, allowing each segment to be optimized independently for both speed and linearity
Solution Approach 2:
The patent employs periodic alternation between two preliminary ramp generators, switching between them in a regular pattern. This periodic action allows the system to maintain high average speed while ensuring each individual ramp phase can proceed slowly enough to maintain linearity
2Manufacturing precision
If slow reset time is used, then linearity is improved, but productivity deteriorates due to limited ramp speed
Solution Approach 1:
The patent merges two separate preliminary ramp signals into a single output voltage ramp signal through multiplexing. This combination allows the system to achieve high productivity by alternating between two slow, linear ramps, effectively doubling the output speed while maintaining the linearity benefits of slow reset times
Solution Approach 2:
The patent ensures continuous useful action by having one preliminary ramp generator actively charging while the other discharges, and vice versa. This continuous alternation eliminates idle time and maintains high productivity throughout the entire operation cycle
3Device complexity
If single capacitor charging is used, then device complexity is reduced, but measurement precision deteriorates due to nonlinearity in the ramp signal
Solution Approach 1:
The patent creates a copy of the ramp generation circuit using a second capacitor and associated switching elements. This copied circuit generates a preliminary ramp signal that is identical in structure but operates out of phase with the first, providing a redundant signal that can be multiplexed to achieve higher linearity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution achieves a high degree of linearity in the output voltage ramp signal, reducing noise and improving the speed and precision of switching regulators by eliminating fast reset-induced distortions.
Implementation Method 1
A common design for generating a voltage ramp signal uses a capacitor repeatedly charged by a current source, such that the voltage on the capacitor increases like a ramp waveform
Data Source
AI summary
An improved ramp generator enables a very high degree of linearity in an output voltage ramp signal. Output ramps of the output voltage ramp signal are alternatingly produced from two preliminary ramp signals during alternating time periods. Preliminary ramps are produced at different preliminary ramp nodes that are alternatingly connected to an output node. The preliminary ramps continuously ramp during and in some cases beyond, e.g., before and/or after, the time periods. In some embodiments, switches alternatingly connect two capacitors to at least one current source, a reset voltage source, and the output node to alternatingly produce the preliminary ramps.