Dual-Capacitor Ramp Generator for Linear High-Speed Voltage Ramps
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Solution Overview
Problem
High-speed ramp generators suffer from limited slew time, leading to nonlinearity and harmonic distortion in voltage ramp signals, which limits the speed of switching regulators and introduces ringing, overshoot, and undershoot.
Innovation Solution
An improved ramp generator design using two preliminary voltage ramp signals generated by alternatingly charging capacitors, allowing for slow reset times and multiplexing between them to produce highly linear output voltage ramps, reducing noise and nonlinearity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a fast discharge is used to reset the capacitor quickly, then the ramp speed increases, but ringing, overshoot, and undershoot occur that severely limit linearity
Solution Approach 1:
The patent divides the single ramp generation task into two separate preliminary ramp signals generated by different capacitors. These segmented ramp signals are then combined through multiplexing to create the final output, allowing each segment to be optimized for linearity while maintaining overall speed performance
Solution Approach 2:
The patent employs periodic alternation between two preliminary ramp signals, switching between them in a regular pattern. This periodic action allows the system to maintain fast effective ramp speed while each individual ramp can use slower, more linear charging/discharge cycles
2Manufacturing precision
If a slow discharge is used to maintain linearity, then the voltage ramp signal remains linear, but the ramp speed decreases limiting switching regulator performance
Solution Approach 1:
The patent merges two separate preliminary voltage ramp signals into a single output signal through multiplexing. By combining these two signals that are generated with slow, linear discharge rates, the system achieves both linearity and high effective speed
Solution Approach 2:
The patent transitions from a single-dimensional time-based ramp generation to a two-dimensional approach by introducing a second capacitor and current source operating in parallel. This adds a temporal dimension through alternating selection of the two ramps, effectively doubling the speed while maintaining linearity
3Device complexity
If a single capacitor is used for ramp generation, then the device complexity is low, but the slew time is limited causing nonlinearity and harmonic distortion
Solution Approach 1:
The patent segments the single capacitor into two separate capacitors, each generating its own preliminary ramp signal. This segmentation allows each capacitor to operate with optimized timing parameters, improving overall linearity while distributing the complexity across two simpler subsystems
Solution Approach 2:
The patent creates a copy of the ramp generation circuitry with a second capacitor and current source. This copied subsystem generates an identical preliminary ramp signal that is then alternated with the first, effectively doubling the available ramp periods while maintaining the same simple circuit topology
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design achieves a high degree of linearity in voltage ramp signals, reducing noise and harmonic distortion, and enabling faster switching regulators with precise timing.
Implementation Method 1
A common design for generating a voltage ramp signal uses a capacitor repeatedly charged by a current source, such that the voltage on the capacitor increases like a ramp waveform
Data Source
AI summary
An improved ramp generator enables a very high degree of linearity in an output voltage ramp signal. Output ramps of the output voltage ramp signal are alternatingly produced from two preliminary ramp signals during alternating time periods. Preliminary ramps are produced at different preliminary ramp nodes that are alternatingly connected to an output node. The preliminary ramps continuously ramp during and in some cases beyond, e.g., before and/or after, the time periods. In some embodiments, switches alternatingly connect two capacitors to at least one current source, a reset voltage source, and the output node to alternatingly produce the preliminary ramps.