Dual Cascode LNA Using Capacitive Coupling for Low-Voltage Linearity
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Solution Overview
Problem
Existing low-noise amplifier (LNA) circuitries face challenges in maintaining low noise and linearity while operating at lower power supply voltages and smaller transistor sizes, which affects biasing and transistor operation.
Innovation Solution
The proposed LNA circuitry employs a dual cascode amplifier configuration with capacitive coupling between the transistors, allowing for separate DC and AC paths. This configuration maintains low power supply requirements while enhancing linearity by cancelling out distortion components.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If transistors are stacked in a cascode configuration to improve linearity and reduce distortion, then linearity is improved, but the required supply voltage increases
Solution Approach 1:
The amplifier is divided into two separate complementary cascode amplifier branches (first and second cascode amplifiers) that are coupled via capacitive coupling rather than stacked in series. This segmentation allows each branch to operate independently with lower voltage requirements while still achieving the linearity benefits of cascode configuration.
Solution Approach 2:
Capacitive coupling is introduced as an intermediary between the first and second cascode amplifiers. The capacitor couples the AC signals between the branches while blocking DC, enabling the branches to be electrically connected for AC signals but isolated for DC biasing, thus allowing lower supply voltage operation.
2Reliability
If capacitor is introduced to couple AC signals between cascode amplifiers to improve linearity, then distortion cancellation is improved, but DC biasing becomes more complex
Solution Approach 1:
The capacitive coupling is applied locally between specific nodes of the cascode amplifiers (between the drains of the common-gate transistors) rather than throughout the entire circuit. This localized coupling provides distortion cancellation at the critical signal nodes while maintaining simple DC biasing paths through the complementary transistor structures.
3Reliability
If complementary cascode amplifiers are used to reduce distortion through symmetry, then linearity is improved, but the circuit complexity increases
Solution Approach 1:
The first and second complementary cascode amplifiers are merged through capacitive coupling to form a unified amplifier structure that achieves distortion cancellation. The complementary NF and PF transistors are combined in parallel branches with their outputs coupled via capacitor, creating a compact structure that provides both linearity improvement and simple DC biasing.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The dual cascode amplifier configuration with capacitive coupling effectively reduces noise and distortion, ensuring high linearity and low power consumption, even at lower supply voltages, thereby addressing the challenges faced by existing LNA technologies.
Implementation Method 1
inputs of the first and second transistors are capacitively coupled such that the first and second transistors are connected at frequencies higher than a frequency characterising the capacitive coupling
Data Source
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AI summary
A low-noise amplifier, LNA, circuitry for amplifying an input signal to an output signal; the circuitry comprising a first cascode amplifier and a second complementary cascode amplifier, respectively connected to a first load and a second load; wherein the first load and the second load are coupled and wherein the output signal is an output of the first or second cascode amplifier; wherein the first cascode amplifier comprises a first initial amplification stage and a first transistor; wherein the second cascode amplifier comprises a second initial amplification stage, and a second transistor, arranged in a common-gate configuration, in cascode with the second initial amplification stage and connected to the second load; and wherein inputs of the first and second transistors are capacitively coupled such that the first and second transistors are connected at frequencies higher than a frequency characterising the capacitive coupling.